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參數(shù)資料
| 型號： | AD1893 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low Cost SamplePort 16-Bit Stereo Asynchronous Sample Rate Converter(低成本采樣端口16位立體聲異步采樣率轉換器) |
| 中文描述： | 低成本SamplePort 16位立體聲異步采樣率轉換器（低成本采樣端口16位立體聲異步采樣率轉換器） |
| 文件頁數(shù)： | 7/20頁 |
| 文件大小： | 338K |
| 代理商： | AD1893 |
AD1893
REV. 0
–7–
THEORY OF OPERATION
There are at least two logically equivalent methods of explaining
the concept of asynchronous sample rate conversion: the high
speed interpolation/decimation model and the polyphase filter
bank model. Using the AD1893 SamplePort does not require
understanding either model. This section is included for those
who wish a deeper understanding of its operation.
Interpolation/Decimation Model
In the high speed interpolation/decimation model, illustrated in
Figure 1, the sampled data input signal (Plot A in Figure 1) is
interpolated at some ratio (IRATIO) by inserting IRATIO-1
zero valued samples between each of the original input signal
samples (Plot B in Figure 1). The frequency domain charac-
teristics of the input signal are unaltered by this operation,
except that the zero-padded sequence is considered to be
sampled at a frequency which is the product of original sampling
frequency multiplied by IRATIO.
The zero-padded values are fed into a digital FIR low-pass filter
(Plot C in Figure 1) to smooth or integrate the sequence, and
limit the bandwidth of the filter output to 20 kHz. The inter-
polated output signal has been quantized to a much finer time
scale than the original sequence. The interpolated sequence is
Figure 1. Interpolation/Decimation Model—Time Domain View
then passed to a zero-order hold functional block (physically
implemented as a register, Plot D in Figure 1) and then
asynchronously resampled at the output sample frequency (Plot
E in Figure 1). This resampling can be thought of as a
decimation operation since only a very few samples out of the
great many interpolated samples are retained. The output values
represent the “nearest” values, in a temporal sense, produced by
the interpolation operation. There is always some error in the
output sample amplitude due to the fact that the output sampling
switch does not close at a time that exactly corresponds to a point
on the fine time scale of the interpolated sequence. However,
this error can be made arbitrarily small by using a very large
interpolation ratio. The AD1893 SamplePort ASRC uses an
equivalent IRATIO of 65,536 to provide 16-bit accuracy
(
≈
–96 dB THD+N) across the 0 to 20 kHz audio band.
The number of FIR filter taps and associated coefficients is
approximately 4 million. The equivalent FIR filter convolution
frequency (or “upsample” frequency) is 3.2768 GHz, and the
fine time scale has resolution of about 300 ps. Various propri-
etary efficiencies are exploited in the AD1893 ASRC to reduce
the complexity and throughput requirements of the hardware
implied by this interpolation/decimation model.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD1893JN | 制造商:Analog Devices 功能描述:Sample Rate Converter 28-Pin PDIP W 制造商:Rochester Electronics LLC 功能描述:LOW COST ASRC PDIP 28-PIN - Bulk |
| AD1893JNZ | 制造商:Analog Devices 功能描述:Sample Rate Converter 28-Pin PDIP W |
| AD1893JST | 制造商:Analog Devices 功能描述:Sample Rate Converter 44-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:LOW COST ASRC 44-PIN TQFP - Tape and Reel 制造商:Analog Devices 功能描述:IC ASR CONVERTER 16 BIT |
| AD1893JSTZ | 功能描述:IC SAMPLE-RATE CONV 16BIT 44TQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SamplePort™ 其它有關文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應商設備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
| AD1893JSTZRL | 功能描述:IC SAMPLE-RATE CONV 16BIT 44TQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SamplePort™ 其它有關文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應商設備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
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