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參數(shù)資料
| 型號： | AD1895 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 3 V/5 V Digital Audio Receiver,External APLL(數(shù)字音頻接收器) |
| 中文描述： | 3伏/ 5 V數(shù)字音頻接收器，外部美集（數(shù)字音頻接收器） |
| 文件頁數(shù)： | 1/16頁 |
| 文件大小： | 130K |
| 代理商： | AD1895 |
a
3 V/5 V Dgital Audio Receiver,
External APLL
AD1895
Analog Devices, Inc., 1996
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
CP-1201, CP-340, IEC-958, AES/EBU, S/PDIF Digital
Audio Receiver
Status Pins for Stand-Alone Operation
Requires External Analog Phase Lock Loop
Single +3 V to 5 V Supply
Complete Error Reporting
Low Operating Power Dissipation
Three-Wire Serial Data Port with I
2
S-Compatible
Output Mode
28-Lead SSOP Package
APPLICATIONS
Consumer and Professional Digital Audio Equipment
Computer Multimedia Products
PRODUCT OVE RVIE W
T he 3 V to 5 V AD1895 is a CP-1201, CP-340, IEC-958, AES/
EBU, S/PDIF compatible digital audio receiver (DAR). K ey
status information from the input digital data stream and the
channel status register is reported on output pins on the AD1895,
so that the AD1895 may be used in systems which do not in-
clude a microcontroller.
T he AD1895 uses a proprietary method to lock to the incoming
serial digital stream which is superior to other IC implementa-
tions. T he AD1895 requires an external analog phase lock loop
circuit, such as the T exas Instruments T LC2932.
T he AD1895 is offered in a 28-pin shrink small outline package
(SSOP). It operates over the commercial temperature range
from 0
°
C to +70
°
C, at a supply voltage from 2.7 V to 5.5 V.
Power dissipation at 3 V is T BD. T he AD1895 is fabricated in
a 0.5
μ
m single poly, double metal CMOS process.
FUNCT IONAL BLOCK DIAGRAM
SERIAL
DIGITAL
INPUT
2
RECEIVER/
BIPHASE-MARK
DECODER
CLOCK
RECOVERY
CLOCK
DATA
DATA
RECOVERY
DLRCLK
LRCLK
PCLK
ASCLK
INTERFACE TO
EXTERNAL ANALOG PLL
CHANNEL
STATUS BUFFER
VBIT
UBIT
CSBIT
SFCLK
SUB FRAME STATUS
DLRCLK
DSDATA
DBCLK
RAW DATA,
JITTERED CLOCKS
CA
CB
CC
CD
CE
CSLR
CSCLK
CHANNEL STATUS
ERROR
RESET
POWER
2
CLK256
SDATA
BCLK
LRCLK
I
2
S INTERFACE
CON/
PRO
PARITY
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD1895AYRS | 制造商:Analog Devices 功能描述:Sample Rate Converter 28-Pin SSOP 制造商:Rochester Electronics LLC 功能描述:192KHZ 8:1 STEREO ASYNC SAMPLE RATE CONV - Bulk 制造商:Analog Devices 功能描述:IC STEREO ASR CONVERTER |
| AD1895AYRSRL | 制造商:Analog Devices 功能描述:Sample Rate Converter 28-Pin SSOP T/R |
| AD1895AYRSZ | 功能描述:IC CONV SAMPLE RATE ASYNC 28SSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
| AD1895AYRSZRL | 功能描述:IC SAMP-RATEHP/CONV 24BIT 28SSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
| AD1895YRS | 制造商:Rochester Electronics LLC 功能描述:192KHZ 8:1 STEREO ASYNC S - Bulk |
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