參數(shù)資料
型號: AD10242BZ
廠商: Analog Devices Inc
文件頁數(shù): 6/16頁
文件大小: 0K
描述: IC ADC DUAL 12BIT 68-CLCC
標準包裝: 1
位數(shù): 12
采樣率(每秒): 40M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 2W
電壓電源: 模擬和數(shù)字,雙 ±
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 68-CLCC
供應商設備封裝: 68-CLCC(24.13x24.13)
包裝: 托盤
輸入數(shù)目和類型: 6 個單端,雙極
配用: AD10242/PCB-ND - KIT EVAL PCB FOR AD10242
AD10242
–14–
REV. C
Care should be taken when placing the digital output runs.
Because the digital outputs have such a high slew rate, the
capacitive loading on the digital outputs should be minimized.
Circuit traces for the digital outputs should be kept short and
connect directly to the receiving gate. Internal circuitry buffers
the outputs of the AD9042 ADC through a resistor network to
eliminate the need to externally isolate the device from the
receiving gate.
EVALUATION BOARD
The AD10242 evaluation board (see Figure 16) is designed to
provide optimal performance for evaluation of the AD10242
analog-to-digital converter. The board encompasses everything
needed to ensure the highest level of performance for evaluating
the AD10242.
Power to the analog supply pins is connected via banana jacks.
The analog supply powers the crystal oscillator, the associated
components and amplifiers, and the analog section of the
AD10242. The digital outputs of the AD10242 are powered via
Pin 1 of either J9 or J10 found on the digital interface con-
nector. To power the evaluation board with one 5 V supply, a
jumper wire is required from test point E1 to E4. Contact the
factory if additional layout or applications assistance is required.
Figure 16. Evaluation Board Mechanical Layout
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