參數(shù)資料
型號(hào): A43P26161G-75
廠商: AMIC Technology Corporation
英文描述: 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM
中文描述: 100萬(wàn)× 16位× 4個(gè)銀行的低功耗同步DRAM
文件頁(yè)數(shù): 40/44頁(yè)
文件大?。?/td> 1122K
代理商: A43P26161G-75
A43P26161
PRELIMINARY (July, 2005, Version 1.1)
39
AMIC Technology, Corp.
Function Truth Table (Table 1, Continued)
Current
State
CS
RAS
CAS
WE
BS
Address
Action
Note
H
X
X
X
X
X
NOP(Continue Burst to End
Precharge)
NOP(Continue Burst to End
Precharge)
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
NOP
Idle after t
RP
NOP
Idle after t
RP
ILLEGAL
ILLEGAL
ILLEGAL
NOP
Idle after t
RP
ILLEGAL
NOP
Row Active after t
RCD
NOP
Row Active after t
RCD
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
NOP
Idle after t
RC
NOP
Idle after t
RC
ILLEGAL
ILLEGAL
ILLEGAL
NOP
Idle after 2 clocks
L
H
H
H
X
X
L
L
L
L
L
H
H
H
H
L
L
X
H
L
L
H
L
X
L
H
L
X
X
X
X
BS
BS
BS
X
X
X
CA,A10/AP
CA,A10/AP
RA, PA
X
X
2
2
2
Write with
Auto
Precharge
L
H
H
H
X
X
L
L
L
L
H
H
L
L
H
L
H
H
L
X
H
L
X
BS
BS
BS
X
CA,A10/AP
RA
A10/AP
2
2
2
Precharge
L
H
L
X
L
X
X
X
X
X
X
X
4
L
H
H
H
X
X
L
L
L
L
L
H
H
H
L
L
L
X
H
L
H
H
L
X
L
X
H
L
X
X
X
BS
BS
BS
X
X
X
CA,A10/AP
RA
A10/AP
X
X
2
2
2
2
Row
Activating
L
H
H
X
X
X
L
L
L
H
H
L
L
X
L
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
Refreshing
L
H
H
H
H
X
NOP
Idle after 2 clocks
ILLEGAL
L
H
H
L
X
X
L
L
H
L
L
X
X
X
X
X
X
X
ILLEGAL
ILLEGAL
Mode
Register
Accessing
Abbreviations
Note: 1. All entries assume that CKE was active (High) during the preceding clock cycle and the current clock cycle.
2. Illegal to bank in specified state: Function may be legal in the bank indicated by BA, depending on the state of that bank.
3. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
4. NOP to bank precharging or in idle state. May precharge bank indicated by BS (and PA).
5. Illegal if any banks is not idle.
RA = Row Address
NOP = No Operation Command
BS = Bank Address
CA = Column Address
AP = Auto Precharge
PA = Precharge All
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