- 您現(xiàn)在的位置：買賣IC網 > PDF目錄375141 > A43P26161G-75 (AMIC Technology Corporation) 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM PDF資料下載
參數資料
| 型號： | A43P26161G-75 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| 中文描述： | 100萬× 16位× 4個銀行的低功耗同步DRAM |
| 文件頁數： | 21/44頁 |
| 文件大?。?/td> | 1122K |
| 代理商： | A43P26161G-75 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁
A43P26161
PRELIMINARY (July, 2005, Version 1.1)
20
AMIC Technology, Corp.
12. About Burst Type Control
Sequential counting
At MRS A3=”0”. See the BURST SEQUENCE TABE.(BL=4,8)
BL=1,2,4,8 and full page wrap around.
At MRS A3=” 1”. See the BURST SEQUENCE TABE.(BL=4,8)
BL=4,8 At BL=1,2 Interleave Counting = Sequential Counting
Every cycle Read/Write Command with random column address can realize
Random Column Access.
That is similar to Extended Data Out (EDO) Operation of convention DRAM.
Basic
MODE
Interleave counting
Random
MODE
Random column Access
t
CCD
= 1 CLK
13. About Burst Length Control
1
At MRS A2,1,0 = “000”.
At auto precharge, tRAS should not be violated.
At MRS A2,1,0 = “001”.
At auto precharge, tRAS should not be violated.
At MRS A2,1,0 = “010”
At MRS A2,1,0 = “011”.
At MRS A9=”1”.
Read burst = 1,2,4,8, full page/write Burst =1
At auto precharge of write, tRAS should not be violated.
Before the end of burst, Row precharge command of the same bank
Stops read/write burst with Row precharge.
t
RDL
= 2 with DQM, valid DQ after burst stop is 1,2 for CL=2,3 respectively
During read/write burst with auto precharge, RASinterrupt cannot be issued.
Before the end of burst, new read/write stops read/write burst and starts new
read/write burst or block write.
During read/write burst with auto precharge,
CAS
interrupt can not be issued.
2
4
8
Basic
MODE
Special
MODE
BRSW
RASInterrupt
(Interrupted by Precharge)
Interrupt
MODE
CAS
Interrupt
相關PDF資料 |
PDF描述 |
|---|---|
| A43P26161V-95F | 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161V-95U | 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161G-75F | OSC 3.3V SMT 7X5 CMOS |
| A43P26161G-75U | 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161G-75UF | 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| A43P26161G-75F | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161G-75U | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161G-75UF | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161G-95 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161G-95F | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復。