參數(shù)資料
型號: 9S12DT256DGV3
廠商: Motorola, Inc.
英文描述: MC9S12DT256 Device User Guide V03.03
中文描述: MC9S12DT256設備的用戶手冊V03.03
文件頁數(shù): 70/130頁
文件大?。?/td> 2077K
代理商: 9S12DT256DGV3
MC9S12DT256 Device User Guide — V03.03
68
2.4.7 VREGEN — On Chip Voltage Regulator Enable
Enables the internal 5V to 2.5V voltage regulator. If this pin is tied low, VDD1,2 and VDDPLL must be
supplied externally.
V
DDPLL
43
2.5 V
Provides operating voltage and ground for the Phased-Locked
Loop. This allows the supply voltage to the PLL to be
bypassed independently. Internal power and ground
generated by internal regulator.
Internal Voltage Regulator enable/disable
V
SSPLL
45
0 V
VREGEN
97
5V
Mnemonic
Pin Number
112-pin QFP
Nominal
Voltage
Description
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