參數(shù)資料
型號： 9S12C128DGV1
英文描述： MC9S12C Family Device User Guide
中文描述： MC9S12C家庭設(shè)備用戶指南
文件頁數(shù)： 55/136頁
文件大?。?/td> 2190K
代理商： 9S12C128DGV1
55
2.2 Signal Properties Summary
Table 2-1 Signal Properties
Internal Pull
Resistor
Pin Name
Function 1
Pin Name
Function 2
Pin Name
Function 3
Power
Domain
Description
CTRL
Reset
State
NA
NA
None
NA
NA
Up
Up
EXTAL
XTAL
RESET
XFC
TEST
BKGD
PE7
—
—
—
—
VPP
MODC
NOACC
—
—
—
—
—
VDDPLL
VDDPLL
VDDX
VDDPLL
VSSX
VDDX
VDDX
NA
NA
None
NA
NA
Up
PUCR
While RESET
pin is low: Down
While RESET
pin is low: Down
Oscillator pins
External reset pin
PLL loop filter pin
Test pin only
Background debug, mode pin, tag signal high
Port E I/O pin, access, clock select
TAGHI
XCLKS
PE6
IPIPE1
MODB
VDDX
Port E I/O pin and pipe status
PE5
IPIPE0
MODA
VDDX
Port E I/O pin and pipe status
PE4
ECLK
—
VDDX
PUCR
Mode
Dep
1
Mode
Dep
(1)
Mode
Dep
(1)
Up
Up
Port E I/O pin, bus clock output
PE3
LSTRB
TAGLO
VDDX
PUCR
Port E I/O pin, low strobe, tag signal low
PE2
R/W
—
VDDX
PUCR
Port E I/O pin, R/W in expanded modes
PE1
PE0
IRQ
XIRQ
—
—
VDDX
VDDX
PUCR
PUCR
Port E input, external interrupt pin
Port E input, non-maskable interrupt pin
PA[7:3]
ADDR[15:1/
DATA[15:1]
ADDR[10:9/
DATA[10:9]
ADDR[8]/
DATA[8]
ADDR[7:5]/
DATA[7:5]
ADDR[4]/
DATA[4]
ADDR[3:0]/
DATA[3:0]
—
VDDX
PUCR
Disabled Port A I/O pin & multiplexed address/data
PA[2:1]
—
VDDX
PUCR
Disabled Port A I/O pin & multiplexed address/data
PA[0]
—
VDDX
PUCR
Disabled
Port A I/O pin & multiplexed address/data
PB[7:5]
—
VDDX
PUCR
Disabled Port B I/O pin & multiplexed address/data
PB[4]
—
VDDX
PUCR
Disabled
Port B I/O pin & multiplexed address/data
PB[3:0]
—
VDDX
PUCR
Disabled Port B I/O pin & multiplexed address/data
PAD[7:0]
AN[7:0]
—
VDDA
PERAD/P
PSAD
PERP/
PPSP
PERP/
PPSP
PERP/
PPSP
PERP/
PPSP
Disabled
Port AD I/O pins and ATD inputs
PP[7]
KWP[7]
—
VDDX
Disabled Port P I/O Pins and keypad wake-up
PP[6]
KWP[6]
ROMCTL
VDDX
Disabled
Port P I/O Pins, keypad wake-up and ROMON
enable.
PP[5]
KWP[5]
PW5
VDDX
Disabled
Port P I/O Pin, keypad wake-up, PW5 output
PP[4:3]
KWP[4:3]
PW[4:3]
VDDX
Disabled Port P I/O Pin, keypad wake-up, PWM output
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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