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參數(shù)資料
| 型號： | 9LPRS464YGLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 240 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153N, TSSOP-56 |
| 文件頁數(shù)： | 17/23頁 |
| 文件大?。?/td> | 246K |
| 代理商： | 9LPRS464YGLFT |
3
ICS9LPRS464
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUss
IDTTM/ICSTM
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUs
1377A—04/07/08
Pin Description (Continued)
PIN #
PIN NAME
TYPE
DESCRIPTION
29
*CLKREQC#
IN
Programmable Clock Request pin for SRC/ATIG/SB_SRC outputs. If output is
selected for control, then that output is controlled as follows:
0 = Enabled, 1 = Tri-state
30
ATIG1C_LPR
OUT
Complementary clock of low-power differential push-pull PCI-Express pair with
integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
31
ATIG1T_LPR
OUT
True clock of low-power differential push-pull PCI-Express pair with integrated
33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
32
GNDATIG
GND
Ground pin for the ATIG outputs
33
VDDATIG
PWR
Power supply for ATIG core, nominal 3.3V
34
ATIG0C_LPR
OUT
Complementary clock of low-power differential push-pull PCI-Express pair with
integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
35
ATIG0T_LPR
OUT
True clock of low-power differential push-pull PCI-Express pair with integrated
33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
36
VDDSRC
PWR
Supply for SRC, 3.3V nominal
37
GNDSRC
GND
Ground pin for the SRC outputs
38
SRC0C_LPR
OUT
Complement clock of low power differential SRC clock pair with integrated 33
ohm series resistor. (no 50ohm shunt resistor to GND needed)
39
SRC0T_LPR
OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
40
NC
No Connect
41
GNDA
GND
Ground for the Analog Core
42
VDDA
PWR
3.3V Power for the Analog Core
43
CPUKG1C_LPR
OUT
Complementary signal of low-power differential push-pull AMD K8 "Greyhound"
clock with integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND
needed)
44
CPUKG1T_LPR
OUT
True signal of low-power differential push-pull AMD K8 "Greyhound" clock with
integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
45
GNDCPU
GND
Ground pin for the CPU outputs
46
VDDCPU
PWR
Supply for CPU, 3.3V nominal
47
CPUKG0C_LPR
OUT
Complementary signal of low-power differential push-pull AMD K8 "Greyhound"
clock with integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND
needed)
48
CPUKG0T_LPR
OUT
True signal of low-power differential push-pull AMD K8 "Greyhound" clock with
integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
49
*CLKREQA#
IN
Programmable Clock Request pin for SRC/ATIG/SB_SRC outputs. If output is
selected for control, then that output is controlled as follows:
0 = Enabled, 1 = Tri-state
50
GNDHTT
PWR
Ground pin for the HTT outputs
51
HTTCLK0
OUT
3.3V single ended 66MHz hyper transport clock
52
VDDHTT
PWR
Supply for HTT clocks, nominal 3.3V.
53
**PD
IN
Enter /Exit Power Down.
1 = Power Down, 0 = normal operation.
54
FS2/REF2
I/O
Frequency select latch input pin/ 3.3V 14.318MHz reference clock
55
FS1/REF1
I/O
Frequency select latch input pin/ 3.3V 14.318MHz reference clock
56
FS0/REF0
I/O
Frequency select latch input pin/ 3.3V 14.318MHz reference clock
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