參數資料
型號: 935267395518
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號轉換
英文描述: COLOR SIGNAL DECODER, PBGA156
封裝: 15 X 15 MM, 1.15 MM HEIGHT, PLASTIC, MS-034, SOT-472-1, BGA-156
文件頁數: 62/178頁
文件大?。?/td> 988K
代理商: 935267395518
2004 Jul 22
154
Philips Semiconductors
Product specication
Multistandard video decoder with adaptive
comb lter and component video input
SAA7118
15.7.8
SUBADDRESSES 9CH TO 9FH
Table 122 Horizontal output window length; register set A [9CH[7:0]; 9DH[3:0]] and B [CCH[7:0]; CDH[3:0]]
Notes
1. Reference for counting are luminance samples.
2. If the desired output length is greater than the number of scaled output pixels, the last scaled pixel is repeated.
Table 123 Vertical output window length; register set A [9EH[7:0]; 9FH[3:0]] and B [CEH[7:0]; CFH[3:0]]
Note
1. If the desired output length is greater than the number of scaled output lines, the processing is cut.
15.7.9
SUBADDRESSES A0H TO A2H
Table 124 Horizontal prescaling; register set A [A0H[5:0]] and B [D0H[5:0]]
HORIZONTAL OUTPUT
ACQUISITION WINDOW
DEFINITION NUMBER OF
DESIRED OUTPUT PIXELS IN
X (HORIZONTAL) DIRECTION(1)
CONTROL BITS
A [9DH[3:0]]
B [CDH[3:0]]
A [9CH[7:0]]
B [CCH[7:0]]
XD11 XD10
XD9
XD8
XD7 XD6 XD5 XD4 XD3 XD2 XD1 XD0
No output
0
00000000
Odd lengths are allowed, but will be
lled up to even lengths
0
00000001
Maximum possible number of input
pixels = 4095; note 2
1
11111111
VERTICAL OUTPUT ACQUISITION
WINDOW DEFINITION NUMBER
OF DESIRED OUTPUT LINES IN
Y (VERTICAL) DIRECTION
CONTROL BITS
A [9FH[3:0]]
B [CFH[3:0]]
A [9EH[7:0]]
B [CEH[7:0]]
YD11 YD10 YD9
YD8
YD7
YD6
YD5
YD4
YD3
YD2
YD1
YD0
No output
0
00000
1 pixel
0
0000000001
Maximum possible number of output
lines = 4095; note 1
1
1111111111
HORIZONTAL INTEGER PRESCALING RATIO (XPSC)
CONTROL BITS D5 TO D0
XPSC5 XPSC4 XPSC3 XPSC2 XPSC1 XPSC0
Not allowed
000000
Downscale = 1
0
00001
Downscale = 1
2
000010
...
Downscale = 1
63
111111
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