參數(shù)資料
型號: 935267395518
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號轉換
英文描述: COLOR SIGNAL DECODER, PBGA156
封裝: 15 X 15 MM, 1.15 MM HEIGHT, PLASTIC, MS-034, SOT-472-1, BGA-156
文件頁數(shù): 112/178頁
文件大小: 988K
代理商: 935267395518
2004 Jul 22
39
Philips Semiconductors
Product specication
Multistandard video decoder with adaptive
comb lter and component video input
SAA7118
8.2.2
DOWNFORMATTER
The block mainly consists of 2 parts: the colour difference
signal downsampler and the Y-path.
The colour difference signals are first passed through
low-pass filters which reduce alias effects due to the lower
data rate. The ITU sampling scheme requires that both
colour difference samples fit to the first Y sample of the
current time slot. Thus the CR signal is delayed by 1 clock
before it is fed to the multiplexer. The switch signal defines
the data multiplex phase at the output: a ‘0’ marks the first
clock of a time slot, this is a CB sample. The output is fed
through a register, so that the multiplexer runs with the
opposite phase.
The delay compensation for the Y signal already provides
most of the registers required for a small high-pass filter.
It can be used to compensate high frequency losses in the
analog part. It provides 2 dB gain at 6.75 MHz.
The Y high-pass filter frequency response is shown in
Fig.26. The DC gain of the filter is 1, so a limiter is required
at the filter output. The current implementation clips at the
maximum values of 0 and 511. The entire filter can be
controlled by the I2C-bus bit CMFI in subaddress 29H.
handbook, full pagewidth
MHB732
LOW-PASS
bypass
HIGH-PASS
CR
CB
CMFI
switch
Y
Q
D
0
1
Q
D
(CR-CB)OUT
Q
D
YOUT
delay compensation
n
Fig.24 Downformatter block diagram.
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