
Philips Semiconductors
PCD3316
CIDCW receiver
Product specication
11 March 1999
4 of 30
9397 750 04824
Philips Electronics N.V. 1999. All rights reserved.
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6.2 Pin description
7.
Functional description
7.1 Preprocessor and analog inputs
The preprocessor for the CAS detection and the FSK receiver incorporates an
Analog-to-Digital Converter (ADC) and a digital bandpass lter.
The LOWBAT input of the PCD3316 can be used for low battery detection. The
voltage on the LOWBAT pin is compared with an internal voltage reference circuit.
When the LOWBAT voltage drops below the reference voltage, the Status register,
bit 5 is set to logic 1.
The PCD3316 can be forced in a Power-down state by switching off the 3.58 MHz
system clock and the ADC. This is done by setting Mode register 2, bit 7 (CIDMD2.7)
to logic 0. To guarantee correct operation the following order of actions must be
1. Switch off CAS and FSK detection (if turned on)
2. Read the interrupt register (thus clearing pending interrupts generated by the
CAS and FSK detector)
3. Switch off the 3.58 MHz oscillator by clearing bit 7 of Mode register 2.
The two low power comparators (inputs POL0 and POL1) and the 32.768 kHz clock
are always active.
Table 2:
Pin description
Symbol
Pin
I/O
Description
HXIN
1
I
3.58 MHz crystal oscillator input
HXOUT
2
O
3.58 MHz crystal oscillator output
IRQ
3
O
interrupt output; programmable active HIGH or active LOW
SCL
4
I
serial clock line of I2C-bus
SDA
5
I/O
serial data line of I2C-bus
LXIN
6
I
32.768 kHz crystal oscillator input
LXOUT
7
O
32.768 kHz crystal oscillator output
DGND
8
digital ground
AGND
9
analog ground
POL1
10
I
polarity detector input 1
POL0
11
I
polarity detector input 0
LOWBAT
12
I
low battery detector input
CASIN
13
I
input pin for CAS signal
FSKIN
14
I
negative input for FSK signal
FSKIN+
15
I
positive input for FSK signal
VDD
16
supply