參數(shù)資料
型號(hào)： 935238950551
廠(chǎng)商： NXP SEMICONDUCTORS
元件分類(lèi)： 數(shù)字傳輸電路
英文描述： CLOCK RECOVERY CIRCUIT, PQFP48
封裝： PLASTIC, SOT-313, LQFP-48
文件頁(yè)數(shù)： 24/26頁(yè)
文件大小： 335K
代理商： 935238950551
1998 Feb 09
7
Philips Semiconductors
Objective specication
SDH/SONET data and clock recovery unit
STM1/4 OC3/12
TZA3004HL
Fig.4 Schematic diagram of TZA3004HL power control loop.
handbook, full pagewidth
2
2
1 k
1
k
1
F
1
H
4.5 V
β > 100
100 nF
3.3
nF
MGK141
BAND GAP
REFERENCE
POWER
CONTROL
VEE
PC
Output amplitude reference (AREF)
The voltage swing at the CML compatible output stages
DOUT, DOUTQ; COUT, COUTQ; DLOOP, DLOOPQ and
CLOOP, CLOOPQ can be controlled by adjusting the
voltage at the AREF pin. An internal voltage divider of
500
and16 k between GND and VEE initially fixes this
level.
In most applications the outputs will be DC coupled to a
load, which can be as low as 50
(±0.20%). The output
level regulation circuit will maintain a 200 mV
peak-to-peak single-ended swing across this load.
The voltage at AREF is half the single-ended peak-to-peak
value of the output signal (or
100 mV in this case).
No adjustments are necessary with DC coupling.
If the outputs are AC coupled, however, the voltage at
AREF is half the single-ended peak-to-peak value of the
output signal multiplied by a factor
where R L is the external load and Ro is the output
impedance of the TZA3004HL.
To maintain a 200 mV peak-to-peak single-ended swing
across a 50
AC coupled load, the voltage at AREF must
be
.
R
L
R
o
+
R
L
--------------------
100 mV
–
50
100
+
()
×
50
-------------------------------------------------------------------------
300 mV
–
=
This can be achieved by connecting a 7.3 k
resistor
between AREF and VEE.
The formulae for calculating the required voltage at AREF
and the external resistance needed between AREF and
VEE when the outputs are AC coupled are:
(1)
and:
(2)
where R1 = 500
, R2 = 16 k and V
EE = 3.3 V. RAREF
is connected between AREF and VEE.
V
AREF
R
L
R
o
+
R
L
--------------------
1
2
--- V
swing
×
–
=
R
AREF
R1
V
EE
V
AREF
-----------------
1
–
×
1
R1
R2
--------
V
EE
V
AREF
-----------------
1
–
×
–
----------------------------------------------------------------
=
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