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參數(shù)資料
| 型號(hào)： | 9248YF-195LF-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 140 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 0.300 INCH, LEAD FREE, MO-118, SSOP-48 |
| 文件頁(yè)數(shù)： | 11/15頁(yè) |
| 文件大小： | 158K |
| 代理商： | 9248YF-195LF-T |
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5
ICS9248-195
0375E—12/15/08
Byte 4: Active/Inactive Register (1 = enable, 0 = disable)
Byte 5: Active/Inactive Register (1 = enable, 0 = disable)
Notes:
1. Inactive means outputs are held LOW and are disabled from switching.
2. Latched register values will be inverted from pin values. Default latch condition is for all latched inputs to be floating
(pulled up via internal resistor) at power-up.
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