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908E626
16
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
Important
VDDA is the supply for the ADC and should be
tied to the same potential as EVDD via separate traces. VSSA
is the ground terminal for the ADC and should be tied to the
same potential as EVSS via separate traces.
For details refer to the 68HC908EY16 datasheet.
MCU Power Supply Terminals (EVDD and EVSS)
EVDD
and EVSS
are the power supply and ground
terminals. The MCU operates from a single power supply.
Fast signal transitions on MCU terminals place high, short-
duration current demands on the power supply. To prevent
noise problems, take special care to provide power supply
bypassing at the MCU.
For details refer to the 68HC908EY16 datasheet.
Test Terminal (FLSVPP)
For test purposes only. Do not connect in the application.
Exposed Pad Terminal
The exposed pad terminal on the bottom side of the package
conducts heat from the chip to the PCB board. For thermal
performance the pad must be soldered to the PCB board. It is
recommended that the pad be connected to the ground
potential.
ANALOG DIE DESCRIPTION
Interrupts
The 908E626 has five different interrupt sources as
described in the following paragraphs. The interrupts can be
disabled or enabled via the SPI. After reset all interrupts are
automatically disabled.
Low-Voltage Interrupt
The Low-Voltage Interrupt (LVI) is related to the external
supply voltage, V
SUP
. If this voltage falls below the LVI
threshold, it will set the LVI flag. If the low-voltage interrupt is
enabled, an interrupt will be initiated.
With LVI the H-Bridges (high-side MOSFET only) are
switched off. All other modules are not influenced by this
interrupt.
High-Voltage Interrupt
The High-Voltage Interrupt (HVI) is related to the external
supply voltage, V
SUP
. If this voltage rises above the HVI
threshold, it will set the HVI flag. If the High-Voltage Interrupt is
enabled, an interrupt will be initiated.
With HVI the H-Bridges (high-side MOSFET only) are
switched off. All other modules are not influenced by this
interrupt.
High-Temperature Interrupt
The High-Temperature Interrupt (HTI) is generated by the
on-chip temperature sensors. If the chip temperature is above
the HTI threshold, the HTI flag will be set. If the High-
Temperature Interrupt is enabled, an interrupt will be initiated.
LIN Interrupt
If the LINIE bit is set, a falling edge on the LIN terminal will
generate an interrupt.
Overcurrent Interrupt
If an overcurrent condition on a half-bridge or the HVDD
output is detected and the OCIE bit is set and an interrupt
generated.
Interrupt Flag Register (IFR)
LINF
—
LIN Flag Bit
This read/write flag is set on the falling edge at the LIN data
line. Clear LINF by writing a logic [1] to LINF. Reset clears the
LINF bit. Writing a logic [0] to LINF has no effect.
1 = Falling edge on LIN data line has occurred.
0 = Falling edge on LIN data line has not occurred since
last clear.
HTF
—
High-Temperature Flag Bit
This read/write flag is set on
a high-temperature condition.
Clear HTF by writing a logic [1] to HTF. If a high-temperature
condition is still present while writing a logic [1] to HTF, the
writing has no effect. Therefore, a high-temperature interrupt
cannot be lost due to inadvertent clearing of HTF. Reset clears
the HTF bit. Writing a logic [0] to HTF has no effect.
1 = High-temperature condition has occurred.
0 = High-temperature condition has not occurred.
Register Name and Address: IFR - $05
Bit7
6
5
4
3
2
1
Bit0
Read
0
0
LINF
HTF
LVF
HVF
OCF
0
Write
Reset
0
0
0
0
0
0
0
0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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