參數(shù)資料
型號: 908E624
廠商: Motorola, Inc.
英文描述: TRIPLE HIGH-SIDE SWITCH WITH EMBEDDED MCU AND LIN
中文描述: 三重高邊開關(guān)與嵌入式微控制器和LIN
文件頁數(shù): 26/32頁
文件大?。?/td> 453K
代理商: 908E624
Analog Integrated Circuit Device Data
Freescale Semiconductor
26
908E624
Functional Description
Functional Device Operation
SPI REGISTER OVERVIEW
Table 7
summarizes the SPI Register bit meaning, reset
value, and bit reset condition.
.
Table 7. SPI Register Overview
SPI Control Register (Write)
Table 8
shows the SPI Control register bits by name.
LINSL2:1—LIN Baud Rate and Low-Power Mode
Selection Bits
These bits select the LIN slew rate and requested low-
power mode in accordance with
Table 9
. Reset clears the
LINSL2:1 bits.
LIN-PU—LIN Pullup Enable Bit
This bit controls the LIN pullup resistor during Sleep and
Stop modes.
1 = Pullup disconnected in Sleep and Stop modes.
0 = Pullup connected in Sleep and Stop modes.
HS3ON:HS1ON—High-Side H3:HS1 Enable Bit
This bit enables the HSx. Reset clears the HSx bit.
1 = HSx switched on (refer to Note below).
0 = HSx switched off.
Note
If no PWM on HS1 and HS2 is required, the PWMIN
terminal must be connected to the VDD terminal.
MODE2:1—Mode Section Bits
The MODE2:1 bits control the operating modes and the
watchdog in accordance with
Table 10
.
To safely enter Sleep or Stop mode and to ensure that
these modes are not affected by noise issue during SPI
transmission, the Sleep/Stop commands require two SPI
transmissions.
Read/Write
Information
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Write
LINSL2
LINSL1
LIN-PU
HS3ON
HS2ON
HS1ON
MODE2
MODE1
Read
INTSRC
(30)
LINWU
or
LINFAIL
HVF
LVF
or
BATFAIL
(31)
VDDT
HSST
L2
L1
Write Reset Value
0
0
0
0
0
0
Write Reset Condition
POR,
RESET
POR,
RESET
POR
POR, RESET
POR,
RESET
POR,
RESET
Notes
30.
31.
D7 signals interrupts and wake-up interrupts, D6:D0 indicated the source.
The first SPI read after reset returns the BATFAIL flag state on bit D4.
Table 8. Control Bits Function (Write Operation)
D7
D6
D5
D4
D3
D2
D1
D0
LINSL2 LINSL1
LIN-PU
HS3ON HS2ON HS1ON MODE2
MODE1
Table 9. LIN Baud Rate and Low-Power Mode Selection
Bits
LINSL2
LINSL1
Description
0
0
Baud Rate up to 20 kbps (normal)
0
1
Baud Rate up to 10 kbps (slow)
1
0
Fast Program Download
Baud Rate up to 100 kbps
1
1
Low-Power Mode (Sleep or Stop) Request
Table 10. Mode Selection Bits
MODE2
MODE1
Description
0
0
Sleep Mode
(32)
0
1
Stop Mode
(32)
1
0
Watchdog Clear
(33)
1
1
Run (Normal) Mode
Notes
32.
To enter Sleep and Stop mode, a special sequence of SPI
commands is implemented.
The device stays in Run (Normal) mode.
33.
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