參數(shù)資料
型號(hào): 908E621
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Integrated Quad Half-Bridge and Triple High-Side with Embedded MCU and LIN for High End Mirror
中文描述: 綜合四半橋和三高的嵌入式微控制器和LIN高端側(cè)鏡
文件頁數(shù): 25/62頁
文件大?。?/td> 540K
代理商: 908E621
Analog Integrated Circuit Device Data
Freescale Semiconductor
25
908E621
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Stop mode has a higher current consumption than Sleep
mode, but allows a quicker wake-up. Additionally the wake-
up sources can be selected (maskable) which is not possible
in Sleep mode.
Figure 12
show the procedure to enter the Stop mode and
how the system is waking up.
Figure 12. STOP mode Wake-up Procedure
Sleep Mode
In Sleep mode the voltage regulator is turned off and the
MCU is not supplied (V
DD
= 0 V) also the
RST_A
terminal is
pulled low.
To enter the Sleep mode the Sleep bit in the System
Control Register has to be set.
Wake-up from this mode is possible by LIN bus activity or
the wake-up input L0 and is not maskable. The wake-up
behaves like a power on reset. The wake-up / reset source
can be evaluated by the L0WF and/or LINWF bits in the
Reset Status Register.
Sleep mode has a lower current consumption than Stop
mode, but requires a longer time to wake-up. The wake-up
sources can not be selected (not maskable).
Figure 13
show the procedure to enter the Sleep mode
and how a wake-up is performed.
Figure 13. SLEEP mode Wake-up Procedure
Table 6
summarized the Operating modes.
From Reset
initialize
operate
SPI:
STOP =1
MCU STOP
IRQ
interrupt
SPI: reason for
interrupt
Switch to VREG
low current mode
Assert IRQ
Switch to VREG
high current mode
MCU
Power Die
Wake Up on
LIN or L0
Enable/disable
LIN/L0 wakeup
From Reset
initialize
operate
SPI:
SLEEP =1
Switch off VREG
Vdd low, RST low
Store Wake Up
Event
Start VREG
Vdd high, RST
high
MCU
Power Die
Wake Up on
LIN or L0
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