參數(shù)資料
型號(hào): 843002AKI-40LF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: XO, clock
英文描述: 175 MHz, OTHER CLOCK GENERATOR, QCC32
封裝: 3 X 3 MM, 0.95 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD, VFQFN-32
文件頁數(shù): 10/24頁
文件大?。?/td> 742K
代理商: 843002AKI-40LF
ICS843002I-40
175MHZ, FEMTOCLOCKS VCXO BASED SONET/SDH JITTER ATTENUATOR
IDT / ICS VCXO BASED SONET/SDH JITTER ATTENUATOR
18
ICS843002AKI-40 REV. B APRIL 27, 2009
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS843002I-40.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS843002I-40 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 210mA = 727.65mW
Power (outputs)MAX = 30mW/Loaded Output pair
If all outputs are loaded, the total power is 2 * 30mW = 60mW
Total Power_MAX (3.3V, with all outputs switching) = 727.65mW + 60mW = 787.65mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device.
The maximum recommended junction temperature for HiPerClockS devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air flow
and a multi-layer board, the appropriate value is 37°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.788W * 37°C/W = 114.2°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type
of board (single layer or multi-layer).
Table 6. Thermal Resistance θJA for 48 Lead TQFP, Forced Convection
θ
JA by Velocity
Meters per Second
01
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
37.0°C/W
32.4°C/W
29.0°C/W
相關(guān)PDF資料
PDF描述
84364-5 22 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT, RECEPTACLE
84364-7 12 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT, RECEPTACLE
84364-8 12 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT, RECEPTACLE
84364-9 34 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT, RECEPTACLE
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