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參數(shù)資料
| 型號(hào)： | 7C187-15 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 64K x 1 Static RAM |
| 中文描述： | 64K的× 1靜態(tài)RAM |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 142K |
| 代理商： | 7C187-15 |
CY7C187
Document #: 38-05044 Rev. **
Page 4 of 9
Switching Characteristics
Over the Operating Range
[6]
(continued)
7C187-25
Min.
7C187-35
Min.
Parameters
READ CYCLE
t
RC
t
AA
t
OHA
t
ACE
t
LZCE
t
HZCE
t
PU
t
PD
WRITE CYCLE
[9]
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
LZWE
t
HZWE
Description
Max.
Max.
Units
Read Cycle Time
Address to Data Valid
Output Hold from Address Change
CE LOW to Data Valid
CE LOW to Low Z
[7]
CE HIGH to High Z
[7, 8]
CE LOW to Power Up
CE HIGH to Power Down
25
35
ns
ns
ns
ns
ns
ns
ns
ns
25
35
5
5
25
35
5
5
10
15
0
0
20
20
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low
WE LOW to High Z
[8]
20
20
20
0
0
15
10
0
5
25
25
25
0
0
20
15
0
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7
10
Switching Waveforms
Read Cycle No. 1
[10, 11]
Notes:
10. WE is HIGH for read cycle.
11.
Device is continuously selected, CE = V
IL
.
ADDRESS
DATA OUT
PREVIOUS DATA VALID
DATA VALID
t
RC
t
AA
t
OHA
C187
–
6
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 7C187-20 | 64K x 1 Static RAM |
| 7C187-25 | 16-Bit, Bidirectional Transceiver |
| 7C187-35 | 64K x 1 Static RAM |
| 7C192-12 | 64K x 4 Static RAM with Separate I/O |
| 7C192-15 | 64K x 4 Static RAM with Separate I/O |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 7C187-20 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:64K x 1 Static RAM |
| 7C187-25 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:64K x 1 Static RAM |
| 7C187-35 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:64K x 1 Static RAM |
| 7C187NT | 制造商:Cypress Semiconductor 功能描述: |
| 7C187NT WAF | 制造商:Cypress Semiconductor 功能描述: |
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