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參數(shù)資料
| 型號： | 7C192-12 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 64K x 4 Static RAM with Separate I/O |
| 中文描述： | 64K的× 4靜態(tài)存儲器具有獨(dú)立的I / O |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 172K |
| 代理商： | 7C192-12 |
64K x 4 Static RAM
with Separate I/O
CY7C192
Cypress Semiconductor Corporation
Document #: 38-05047 Rev. **
3901 North First Street
San Jose
CA 95134
408-943-2600
Revised August 24, 2001
92
Features
High speed
—12 ns
CMOS for optimum speed/power
Low active power
—880 mW
Low standby power
—220 mW
TTL-compatible inputs and outputs
Automatic power-down when deselected
Functional Description
The CY7C192 is a high-performance CMOS static RAM orga-
nized as 65,536 x 4 bits with separate I/O. Easy memory ex-
pansion is provided by active LOW Chip Enable (CE) and
three-state drivers. It has an automatic power-down feature,
reducing the power consumption by 75% when deselected.
Writing to the device is accomplished when the Chip Enable
(CE) and write enable (WE) inputs are both LOW.
Data on the four input pins (I
through I
) is written into the
memory location specified on the address pins (A
0
through
A
15
).
Reading the device is accomplished by taking the Chip Enable
(CE) LOW while the Write Enable (WE) remains HIGH. Under
these conditions the contents of the memory location specified
on the address pins will appear on the four data output pins.
The output pins stay in high-impedance state when Write En-
able (WE) is LOW, or Chip Enable (CE) is HIGH.
A die coat is used to insure alpha immunity.
GND
28
Logic Block Diagram
Pin Configurations
1024 x 64 x 4
ARRAY
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
1
A
1
A
1
A
1
A
1
A
1
COLUMN
DECODER
R
S
POWER
DOWN
WE
O
0
CE
O
1
O
2
O
3
4
5
6
7
8
9
10
11
12
27
26
25
24
23
22
21
20
19
18
1314151617
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
20
19
18
17
21
24
23
22
Top View
DIP/SOJ
A
6
A
7
A
8
A
9
A
10
A
11
A
12
A
13
A
14
A
15
I
0
I
1
WE
V
CC
A
5
A
4
A
3
A
2
A
1
A
0
I
3
I
2
O
3
O
2
O
1
O
0
CE
A
VC
A
9
A
10
A
11
A
12
A
13
A
14
A
15
I
0
I
1
A
4
A
3
A
2
A
1
A
0
I
3
I
2
O
3
O
2
O
G
C
W
Top View
LCC
INPUT BUFFER
25
28
27
26
A
A
A
O0
I
0
I
1
I
2
I
3
7C192 ONLY
A
0
C191
–
1
C191
–
2
C191
–
3
Selection Guide
7C192-12
12
155
30
7C192-15
15
145
30
7C192-20
20
135
30
7C192-25
25
115
30
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
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| 7C192-15 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:64K x 4 Static RAM with Separate I/O |
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