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參數(shù)資料
| 型號： | 7C187-35 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 64K x 1 Static RAM |
| 中文描述： | 64K的× 1靜態(tài)RAM |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 142K |
| 代理商： | 7C187-35 |
64K x 1 Static RAM
CY7C187
Cypress Semiconductor Corporation
Document #: 38-05044 Rev. **
3901 North First Street
San Jose
CA 95134
408-943-2600
Revised August 24, 2001
87
Features
High speed
—15 ns
CMOS for optimum speed/power
Low active power
—495 mW
Low standby power
—220 mW
TTL compatible inputs and outputs
Automatic power-down when deselected
Functional Description
The CY7C187 is a high-performance CMOS static RAM orga-
nized as 65,536 words x 1 bit. Easy memory expansion is pro-
vided by an active LOW Chip Enable (CE) and three-state driv-
ers. The CY7C187 has an automatic power-down feature,
reducing the power consumption by 56% when deselected.
Writing to the device is accomplished when the Chip Enable
(CE) and Write Enable (WE) inputs are both LOW. Data on the
input pin (D
IN
) is written into the memory location specified on
the address pins (A
0
through A
15
).
Reading the device is accomplished by taking the Chip Enable
(CE) LOW, while Write Enable (WE) remains HIGH. Under
these conditions, the contents of the memory location speci-
fied on the address pin will appear on the data output (D
OUT
)
pin.
The output pin stays in high-impedance state when Chip En-
able (CE) is HIGH or Write Enable (WE) is LOW.
The CY7C187 utilizes a die coat to insure alpha immunity.
Logic Block Diagram
Pin Configurations
256 x 256
ARRAY
C187
–
1
A
12
A
13
A
14
A
15
A
0
A
1
A
2
A
3
A
4
A
5
A
1
A
1
COLUMN DECODER
R
S
INPUT BUFFER
POWER
DOWN
DI
DO
CE
WE
A
7
A
6
A
9
A
8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
18
17
16
15
19
22
21
20
Top View
DIP
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
D
OUT
WE
GND
CE
V
CC
A
15
A
14
A
13
A
12
A
11
A
10
A
9
A
8
D
IN
C187
–
2
WE
GND
1
2
3
4
5
6
7
8
9
10
11
12
14
13
15
16
20
19
18
17
21
24
23
22
Top View
SOJ
A
0
A
1
A
2
A
3
A
4
A
5
NC
A
6
A
7
CE
V
CC
A
15
A
14
A
13
A
12
NC
A
11
A
10
A
9
A
8
D
IN
D
OUT
C187
–
3
Selection Guide
[1]
7C187-15
15
90
40/20
7C187-20
20
80
40/20
7C187-25
25
70
20/20
7C187-35
35
70
20/20
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
Note:
1.
For military specifications, see the CY7C187A datasheet.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 7C187NT | 制造商:Cypress Semiconductor 功能描述: |
| 7C187NT WAF | 制造商:Cypress Semiconductor 功能描述: |
| 7C188A | 制造商:Cypress Semiconductor 功能描述: |
| 7C188A WAF | 制造商:Cypress Semiconductor 功能描述: |
| 7C188BT | 制造商:Cypress Semiconductor 功能描述: |
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