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參數(shù)資料
| 型號： | 78P2352-DB/CMI |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 40/42頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD DEMO 78P2352 COAX CABLE |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1 |
| 系列： | * |
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78P2352
Dual Channel
OC-3/ STM1-E/ E4 LIU
Page: 7 of 42
2006 Teridian Semiconductor Corporation
Rev. 2.4
Transmit Driver
In CMI (electrical) mode, the CMIxP/N pins are
biased and terminated off-chip. They interface to
75
coaxial cable through a 1:1 wideband
transformer and coaxial RF connectors. Reference
application
notes
for
schematic
and
layout
guidelines.
The transmitter encodes the data using CMI line
coding and shapes an analog signal to meet the
appropriate ITU-T G.703 template. The CMI outputs
are tri-stated during transmit disable and transmit
power-down for redundancy applications and power-
savings.
Note: To avoid reflections causing unwanted
board noise, it’s recommended to power-down
unused transmit ports that are not terminated
with cable to an Rx input port.
When the CMI pin is low, the chip is in Fiber
(NRZ pass-through) mode and interfaces directly to
an optical transceiver module. The ECLxP/N pins
are internally biased and output NRZ data at
LVPECL levels.
The CMI driver, encoder and
decoder are disabled in Fiber (NRZ) mode.
Clock Synthesizer
The transmit clock synthesizer is a low-jitter DLL that
generates a 278.528/311.04 MHz clock for the CMI
encoder. It is also used in both the receive and
transmit sides for clock and data recovery.
This 2x line rate clock is also available at the
TXCKxP/N pins for downstream synchronization or
system debug.
Transmit Backplane Equalizer
An optional fixed LVPECL equalizer is integrated in
the transmit path for architectures that use LIUs on
active interface cards.
The fixed equalizer can
compensate for up to 1.5m of FR4 trace and can be
enabled by the TXOUT1 pin or TXEQ bit as follows:
TXOUT1 pin
TXEQ bit
Tx Equalizer
Low
1
Enabled
Float
0
Disabled
Transmit Loss of Lock
In transmit modes using the integrated CDR, the
78P2352 will declare a loss of lock condition when
there is no valid signal detected at the SIxDP/N data
inputs.
Note: The Tx LOL indicator is invalid and
undefined when the parallel (nibble) interface is
selected.
POWER-DOWN FUNCTION
Power-down controls are provided to allow the
78P2352 to be shut off.
Transmit and receive
power-down can be set independently through SW
control. Total power-down is achieved by powering
down both the transmitter and receiver.
Note: The serial interface and configuration
registers are not affected by power-down.
In HW mode, both transmitters can also be globally
powered down using the TXPD control pin.
LOOPBACK MODES
In SW mode, LLBKx and RLBKx bits in the Signal
Control Register are provided to activate the local
and remote loopback modes respectively.
In HW mode, the LPBKx pins can be used to
activate local and remote analog loopback modes as
shown in the table below.
LPBK pin Analog Loopback Mode
Low
Normal operation
Float
Remote (analog) Loopback:
Recovered receive clock and data
looped back directly to the transmit
driver. The CMI decoder and most of
transmit path is bypassed.
High
Local (analog) Loopback:
Transmit clock and data looped back to
receiver at the analog media interface.
Rx CDR
CMI
Decoder
RXxP/N
SOxDP/N
SOxCKP/N
POx[3:0]D
POxCK
PTOxCK
PIx[3:0]D
PIxCK
SIxCKP/N
SIxDP/N
FIFO
Tx CDR
Lock Detect
EACH CHANNEL: Rx
CMI
Encoder
ECLxP/N
CMIxP/N
TXxCKP/N
Lock Detect
EACH CHANNEL: Tx
Adaptive
Eq.
LOS Detect
PMOD, SMOD[1:0], PAR
LLBK
RLBK
CMI
Figure 6: Local (Analog) Loopback
Rx CDR
CMI
Decoder
RXxP/N
SOxDP/N
SOxCKP/N
POx[3:0]D
POxCK
PTOxCK
PIx[3:0]D
PIxCK
SIxCKP/N
SIxDP/N
FIFO
Tx CDR
Lock Detect
EACH CHANNEL: Rx
CMI
Encoder
ECLxP/N
CMIxP/N
TXxCKP/N
Lock Detect
EACH CHANNEL: Tx
Adaptive
Eq.
LOS Detect
PMOD, SMOD[1:0], PAR
LLBK
RLBK
CMI
Figure 7: Remote (Analog) Loopback
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 78P2352-IEL | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Dual Channel OC-3/ STM1-E/ E4 LIU |
| 78P2352-IEL/F | 功能描述:接口 - 專用 Dual Ch OC-3/STM1-1e/E4 LIU RoHS:否 制造商:Texas Instruments 產品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:BGA-59 |
| 78P2352-IELR | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Dual Channel OC-3/ STM1-E/ E4 LIU |
| 78P2352-IELR/F | 功能描述:IC LIU SDH SONET 2CH 128-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:25 系列:- 類型:收發(fā)器 驅動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應商設備封裝:16-PDIP 包裝:管件 |
| 78P2352-IGT | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Dual Channel OC-3/ STM1-E/ E4 LIU |
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