參數(shù)資料
型號(hào)： 74F50728
廠商： NXP Semiconductors N.V.
英文描述： Synchronizing cascaded dual positive edge-triggered D-type flip-flop
中文描述： 同步串聯(lián)雙上升沿觸發(fā)D型觸發(fā)器
文件頁(yè)數(shù)： 6/12頁(yè)
文件大小： 89K
代理商： 74F50728
Philips Semiconductors
Product specification
74F50728
Synchronizing cascaded dual positive
edge-triggered D-type flip-flop
September 14, 1990
6
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST
LIMITS
TYP
2
UNIT
CONDITIONS
1
MIN
MAX
V
OH
High-level output voltage
V
CC
= MIN, V
IH
= MIN
I
OH
= MAX
±
10%V
CC
±
5%V
CC
2.5
V
V
IL
= MAX,
2.7
3.4
V
V
OL
Low-level output voltage
V
= MIN, V
IL
=
MAX,
I
OL
= MAX
±
10%V
CC
0.30
0.50
V
V
IH
= MIN
±
5%V
CC
0.30
0.50
V
V
IK
I
I
I
IH
I
IL
Input clamp voltage
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
-0.73
-1.2
V
μ
A
Input current at maximum input voltage
100
High–level input current
20
μ
A
μ
A
μ
A
Low–level input current
Dn
-250
CPn, SDn, RDn
–20
I
OS
I
CC
Short–circuit output current
3
Supply current
4
(total)
V
CC
= MAX, V
O
= 2.25V
V
CC
= MAX
-60
-150
mA
23
34
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25
°
C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
tests should be performed last.
4. Measure I
CC
with the clock input grounded and all outputs open, then with Q and Q outputs high in turn.
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
amb
= +25
°
C
T
amb
= 0
°
C to
+70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF,
R
L
= 500
MIN
T
amb
= –40
°
C to +85
°
C
SYMBOL
PARAMETER
TEST
V
CC
= +5.0V
C
L
= 50pF,
R
L
= 500
MIN
TYP
V
CC
= +5.0V
±
10%
C
L
= 50pF,
R
L
= 500
MIN
UNIT
CONDITION
MAX
MAX
MAX
f
max
t
PLH
t
PHL
t
PLH
t
PHL
t
sk(o)
NOTES TO AC ELECTRICAL CHARACTERISTICS
1. | t
PLH
actual –t
PHL
actual | for any one output compare to any other output where N and M are either LH or HL.
2. Skew lines are valid only under same conditions (temperature, V
CC
, loading, etc.,).
Maximum clock frequency
Waveform 1
100
145
85
70
ns
Propagation delay
CPn to Qn or Qn
Waveform 1
2.0
2.0
3.8
3.8
6.0
6.0
1.5
2.0
6.5
6.5
1.5
2.0
7.5
7.0
ns
Propagation delay
SDn RDn
to Qn or Qn
Output skew
1, 2
Waveform 2
3.5
3.5
5.0
5.0
8.0
8.0
3.0
3.0
9.0
8.5
3.0
3.0
10.5
10.0
ns
Waveform 4
1.5
1.5
1.5
ns
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