參數(shù)資料
型號(hào)： 73M1866B-IM/F
廠商： Maxim Integrated Products
文件頁數(shù)： 74/88頁
文件大?。?/td> 0K
描述： MICRODAA SGL PCM HIGHWAY 42-QFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 260
系列： MicroDAA™
功能： 數(shù)據(jù)存取裝置（DAA）
接口： PCM，串行，SPI
電路數(shù)： 1
電源電壓： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 42-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 42-QFN（8x8）
包裝： 管件
包括： PCM 通路
73M1866B/73M1966B Data Sheet
DS_1x66B_001
76
Rev. 1.6
Function
Mnemonic
Register
Location
Type
Description
Auxiliary A/D Converter Status Bits
LC
0x1C[7:1]
R
Loop Current In DC Path
Result of Auxiliary A/D measuring the Loop Current (7-bit resolution,
least significant bits only).
Note: LC0=1 lsb=1.31/128=~10.23 mV=1.25 mA; magnitude only.
The value of the resistor between the rectifier bridge and the DCS pin is
assumed to be 8.2
.
Example: 0000011
30.7 mV/RE=3.74 mA; 0010000 20 mA
Note: The AC path also has ~7 mA of loop current that should be added
to get the total loop current provided by the line.
LV
0x1B[7:1]
R
Line Voltage On and Off Hook
Contains the seven most significant bits of an 8-bit A/D representation of
the voltage of the input of pin DCI. The voltage at the DCI pin is equal to
the decimal value of LV bits [7:1] x 11 mV. For example, if the value of
0100000x is read from LV bits [7:1], this has a decimal value of 64,
therefore DCI voltage equals 64 x 11 = 704 mV.
Note that the voltage at the DCI pin is the voltage divided by 5 (off hook)
or 100 (on hook). When offhook the diode bridge, switch saturation
voltage, etc. should also be added to calculate the voltage at tip and ring.
RNG
0x1A[7:0]
R
Result of Auxiliary A/D measuring the attenuated ring voltage.
Note: 1 lsb=1.31/128=~10.23 mV; 1’s compliment.
Example: 00100000
327 mV or Ring Voltage=32.7 V
Line Sensing Control
DET
0x03[2]
R
Detection of Voltage or Current Fault
0 = None of the three conditions is detected.
1 = Indicates the detection of one of three conditions:
Under Voltage, Over Voltage and Over Current.
This status bit is reset when read. This is a maskable interrupt. It is
enabled by the ENDET bit.
ENDET
0x05[2]
W
Enables Line Sensing Interrupt On Host-Side Device
This bit controls whether an interrupt is generated based upon the
detection of Under Voltage, Over Voltage and Over Current.
0 = Disable detector interrupt (Default)
1 = Enable detector interrupt.
ENDT
0x12[1]
WO
Enable Detectors On Line-Side Device
0 = UVD, OVD and OID conditions are ignored. (Default)
1 = Enables UVD, OVD and OID in the Line-Side Device and allows
them to be used in the Host-Side Device.
Under-Voltage Detection Control and Status
ENUVD
0x15[2]
WO
Enable Under Voltage Detector On Line-Side Device
0 = Under Voltage Detector not enabled.
1 = Under Voltage Detector enabled. When enabled, the ENNOM bit is
temporarily set to the wide bandwidth mode if an
under-voltage condition detected to allow fast reacquisition of the line.
UVDET
0x1E[6]
R
Under-Voltage Detector On Line-Side Device
0 = Under Voltage condition is not detected at VPS.
1 = Under Voltage condition is detected at VPS.
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