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參數(shù)資料
| 型號： | 71V416S10PHGI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | SRAM |
| 英文描述： | 256K X 16 STANDARD SRAM, 10 ns, PDSO44 |
| 封裝： | 0.400 INCH, TSOP2-44 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 1397K |
| 代理商： | 71V416S10PHGI |
6.42
IDT71V416S, IDT71V416L, 3.3V CMOS Static RAM
4 Meg (256K x 16-Bit) Commercial and Industrial Temperature Ranges
Timing Waveform of Read Cycle No. 2
(1)
ADDRESS
OE
CS
DATA
OUT
3624 drw 07
(3)
DATA
VALID
t
AA
t
RC
t
OE
t
OLZ
BHE, BLE
(3)
t
ACS
(3)
t
BLZ
t
CLZ
(2)
t
BE
(2)
t
OH
t
OHZ(3)
t
CHZ(3)
t
BHZ(3)
OUT
NOTES:
1. A write occurs during the overlap of a LOW
CS
, LOW
BHE
or
BLE
, and a LOW
WE
.
2.
OE
is continuously HIGH. If during a
WE
controlled write cycle
OE
is LOW, t
WP
must be greater than or equal to t
WHZ
+ t
DW
to allow the I/O drivers to turn off and data
to be placed on the bus for the required t
DW
. If
OE
is HIGH during a
WE
controlled write cycle, this requirement does not apply and the mnimumwrite pulse is as
short as the specified t
WP
.
3. During this period, I/O pins are in the output state, and input signals must not be applied.
4. If the
CS
LOW or
BHE
and
BLE
LOW transition occurs simultaneously with or after the
WE
LOW transition, the outputs remain in a high-impedance state.
5. Transition is measured ±200mV fromsteady state.
Timing Waveform of Write Cycle No. 1 (
WE
Controlled Timing)
(1,2,4)
NOTES:
1.
WE
is HIGH for Read Cycle.
2. Address must be valid prior to or coincident with the later of
CS
,
BHE
, or
BLE
transition LOW; otherwise t
AA
is the limting parameter.
3. Transition is measured ±200mV fromsteady state.
ADDRESS
CS
DATA
IN
3624 drw 0
(5)
(5)
(5)
DATA
IN
VALID
t
WC
t
AS
t
WHZ
(2)
t
CW
t
CHZ
t
OW
t
WR
WE
t
AW
DATA
OUT
t
DW
t
DH
PREVIOUS DATA VALID
DATA VALID
BHE
,
BLE
t
BW
t
WP
(5)
t
BHZ
(3)
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| 71V416S10PHGI8 | 功能描述:靜態(tài)隨機存取存儲器 256Kx16 ASYNCHRONOUS 3.3V CMOS 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 71V416S10PHI | 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Async Single 3.3V 4M-Bit 256K x 16 10ns 44-Pin TSOP-II Tube |
| 71V416S10YG | 功能描述:靜態(tài)隨機存取存儲器 256Kx16 ASYNCHRONOUS 3.3V CMOS 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 71V416S10YG8 | 功能描述:靜態(tài)隨機存取存儲器 256Kx16 ASYNCHRONOUS 3.3V CMOS 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 71V416S10YGI | 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Async Single 3.3V 4M-Bit 256K x 16 10ns 44-Pin SOJ Tube/Tray 制造商:Integrated Device Technology Inc 功能描述:SRAM ASYNC SGL 3.3V 4MBIT 256KX16 10NS 44PIN SOJ - Rail/Tube 制造商:Integrated Device Technology Inc 功能描述:256Kx16 ASYNCHRONOUS 3.3V CMOS SRAM |
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