參數(shù)資料
型號： 71V3557SA85BG8
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： SRAM
英文描述： 128K X 36 ZBT SRAM, 8.5 ns, PBGA119
封裝： 14 X 22 MM, POWER, PLASTIC, BGA-119
文件頁數(shù)： 16/28頁
文件大小： 511K
代理商： 71V3557SA85BG8
6.42
IDT71V3557, IDT71V3559, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with
ZBT Feature, 3.3V I/O, Burst Counter, and Flow-Through Outputs
Commercial and Industrial Temperature Ranges
23
NOTES:
1. Device outputs = All device outputs except TDO.
2. Device inputs = All device inputs except TDI, TMS, and
TRST.
Instruction Field
Value
Description
Revision Number (31:28)
0x2
Reserved for version number.
IDT Device ID (27:12)
0x209, 0x20B
Defines IDT part number 71V3557SA and 71V3559SA, respectively.
IDT JEDEC ID (11:1)
0x33
Allows unique identification of device vendor as IDT.
ID Register Indicator Bit (Bit 0)
1
Indicates the presenc e of an ID register.
I5282 tbl 02
JTAG Identification Register Definitions (SA Version only)
Instruction
Description
OPCODE
EXTEST
Forces contents of the bound ary scan cells onto the device outputs(1).
Places the boundary scan registe r (BSR) between TDI and TDO.
0000
SAMPLE/PRELOAD
Places the boundary scan registe r (BSR) between TDI and TDO.
SAMPLE allows data from device inputs(2) and outputs(1) to be captured
in the boundary scan cells and shifted serially through TDO. PRELOAD
allows data to be input serially into the bo undary scan cells via the TDI.
0001
DEVICE_ID
Loads the JTAG ID register (JIDR) with the vendor ID code and places
the register between TDI and TDO.
0010
HIGHZ
Places the bypass register (BYR) be tween TDI and TDO. Forces all
device o utput drivers to a High-Z state.
0011
RESERVED
Several combinations are reserved. Do not use codes other than those
identified for EXTEST, SAMPLE/PRELOAD, DEVICE_ID, HIGHZ, CLAMP,
VALIDATE and BYPASS instructions.
0100
RESERVED
0101
RESERVED
0110
RESERVED
0111
CLAMP
Uses BYR. Forces contents of the bound ary scan cells onto the device
outputs. Places the byp ass registe r (BYR) between TDI and TDO.
1000
RESERVED
Same as above.
1001
RESERVED
1010
RESERVED
1011
RESERVED
1100
VALIDATE
Automatically loaded into the instruction register whenever the TAP
controller passes through the CAPTURE-IR state. The lower two bits '01'
are mand ated by the IEEE std. 1149.1 specification.
1101
RESERVED
Same as above.
1110
BYPASS
The BYPASS instruction is used to truncate the boundary scan register
as a single bit in length.
1111
I5282 tbl 04
Available JTAG Instructions
相關PDF資料
PDF描述
71V67703S75BQ 256K X 36 CACHE SRAM, 7.5 ns, PBGA165
72-30-33 0 MHz - 4000 MHz RF/MICROWAVE FIXED ATTENUATOR
72-40-43 0 MHz - 4000 MHz RF/MICROWAVE FIXED ATTENUATOR
72-10-14 0 MHz - 4000 MHz RF/MICROWAVE FIXED ATTENUATOR
72-30-13 0 MHz - 4000 MHz RF/MICROWAVE FIXED ATTENUATOR
相關代理商/技術參數(shù)
參數(shù)描述
71V3558S100PFG 功能描述:靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
71V3558S100PFG8 功能描述:靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
71V3558S100PFGI 功能描述:靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
71V3558S100PFGI8 功能描述:靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
71V3558S133BG 制造商:Integrated Device Technology Inc 功能描述:4.5MBIT SRAM CHIP SYNC SINGLE 3.3V 256K X 18 4.2NS - Trays 制造商:Integrated Device Technology Inc 功能描述:IDT 71V3558S133BG, 4.5MBit SRAM Chip Sync Single 3.3V 256K x 18 4.2ns 119-Pin BGA
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*