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參數(shù)資料
| 型號： | 71T016SA20BFGI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | SRAM |
| 英文描述： | 64K X 16 STANDARD SRAM, 20 ns, PBGA48 |
| 封裝： | 7 X 7 MM, PLASTIC, FBGA-48 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 477K |
| 代理商： | 71T016SA20BFGI |
APRIL 2004
DSC-5326/01
1
2004 Integrated Device Technology, Inc.
Features
◆
64K x 16 advanced high-speed CMOS Static RAM
◆
Equal access and cycle times
— Commercial: 10/12/15/20ns
— Industrial: 12/15/20ns
◆
One Chip Select plus one Output Enable pin
◆
Bidirectional data inputs and outputs directly
LVTTL-compatible
◆
Low power consumption via chip deselect
◆
Upper and Lower Byte Enable Pins
◆
Single 2.5V power supply
◆
Available in 44-pin Plastic SOJ, 44-pin TSOP, and 48-Ball
Plastic FBGA packages
Description
The IDT71T016 is a 1,048,576-bit high-speed Static RAMorganized
as 64K x 16. It is fabricated using IDT’s high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective solution for high-
speed memory needs.
The IDT71T016 has an output enable pin which operates as fast as
5ns, with address access times as fast as 10ns. All bidirectional inputs and
outputs of the IDT71T016 are LVTTL-compatible and operation is froma
single 2.5V supply. Fully static asynchronous circuitry is used, requiring
no clocks or refresh for operation.
The IDT71T016 is packaged in a JEDEC standard a 44-pin Plastic
SOJ, 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mmFBGA.
Functional Block Diagram
2.5V CMOS Static RAM
1 Meg (64K x 16-Bit)
IDT71T016SA
Output
Enable
Buffer
Address
Buffers
Chip
Enable
Buffer
Write
Enable
Buffer
Byte
Enable
Buffers
OE
A
0
– A
15
Row / Column
Decoders
CS
WE
BHE
BLE
64K x 16
Memory
Array
Sense
Amps
and
Write
Drivers
16
Low
Byte
I/O
Buffer
8
8
8
8
I/O
8
I/O
15
I/O
7
I/O
0
5326 drw 01
High
Byte
I/O
Buffer
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