參數(shù)資料
型號： 5962R0722402VYC
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PQFP256
封裝： QFP-256
文件頁數(shù)： 80/155頁
文件大?。?/td> 4139K
代理商： 5962R0722402VYC
30
7703D–AERO–12/09
AT697F PRELIMINARY INFORMATION
PR
ELI
MINA
R
Y
IN
FOR
M
AT
IO
N
Write Protection
Two write protection schemes are provided to prevent accidental over-writing to the RAM area,
the “Start/End address Scheme” and the “Mask Scheme”. These two schemes are explained in
the following two sub-chapter
Start/End address
Scheme
Two memory areas are defined by using a start-address and an end-address register. The first
address of the protected memory area is calculated as 0x40000000 + START*4. The last
address of the protected memory area is calculated as 0x40000000 + END*4.
Table 12.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
START
BP
0
Start Address Register (WPSTAx)
Table 13.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
STOP
US SU
End Address Register (WPSTOx)
Setting WPSTAx BPx to logical one, any access inside the two areas defined by the start/end
registers will cause a memory exception (trap 0x2B). The first address of the protected against
write operation is calculated as 0x40000000 + START*4. The first address outside the protected
memory area is calculated as 0x40000000 + END*4 + 4.
Setting WPSTAx BPx to logical zero the area between the start address and the end address
defines the memory where write access is permitted, and a write access outside both areas will
cause a memory exception (trap 0x2B). The first address where write operation is permitted is
calculated as 0x40000000 + START*4. The first address outside the protected allowed area is
calculated as 0x40000000 + END*4 + 4.
The start/end address protection scheme is enabled when at least one of the user mode protec-
tion and the supervisor mode protection is valid. The write protection can be configured to
prevent the application from user and/or supervisor write access.
Memory is protected against User write when WPSTOx USx bit is set logical 1
Memory is protected against Superviser write when WPSTOx SUx bit is set logical 1
相關(guān)PDF資料
PDF描述
5962R8958702VXA 5 V FIXED POSITIVE LDO REGULATOR, 1 V DROPOUT, CDSO16
5962R9215311VTA 32K X 8 STANDARD SRAM, 55 ns, CDFP36
5962R9215311VTX 32K X 8 STANDARD SRAM, 55 ns, CDFP36
5962G9215309VMX 32K X 8 STANDARD SRAM, 55 ns, CDIP28
5962F9215315VMC 32K X 8 STANDARD SRAM, 70 ns, CDIP28
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
5962R0722601VZA 制造商:Texas Instruments 功能描述:D/A CONVERTER, 12-BIT - Trays
5962R0722701VZA 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Ch 50 kSPS-1 MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
5962R0722902VXA 功能描述:低壓差穩(wěn)壓器 - LDO 3-Terminal Adj Reg RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20
5962R0722961VXA 功能描述:低壓差穩(wěn)壓器 - LDO 3-Terminal Adj Reg RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20
5962R0724902VPC 制造商:Intersil Corporation 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*