參數(shù)資料
型號： 28233-11
廠商： CONEXANT SYSTEMS
元件分類： 數(shù)字傳輸電路
英文描述： ATM Transmitter/Receiver with UTOPIA Interface
中文描述： TRANSCEIVER, PQFP160
封裝： PLASTIC, MQFP-160
文件頁數(shù)： 63/161頁
文件大小： 1832K
代理商： 28233-11
overflow. Reading the interrupt source register allows the microprocessor to
identify overflows and update internal counts. All counters can be read by the
microprocessor and are cleared when read.
CN8223
2.0 Functional Description
ATM Transmitter/Receiver with UTOPIA Interface
2.6 ATM Cell Processing
100046C
Conexant
2-29
2.6.2 Cell Validation for Receive
Cell validation refers to the checking of cells coming in from the PHY block for
proper format. Modes that deliver 48-, 52- or 53-octet cells, or 57-octet PLCP
slots to the FIFO output ports are provided by the CN8223.
Four modes are available for cell output:
A test mode writes the entire 57-octet PLCP slot to the FIFO interface.
A 53-octet mode writes the 53-octet ATM cell to the FIFO interface.
A 52-octet mode writes the ATM cell without the HEC octet to the FIFO
interface.
A final mode delivers 48-octet cell payloads to the FIFO interface.
When the UTOPIA interface mode is used, only 53-octet output is available.
The protocol verification provided includes HEC validation with ATM or
SMDS/802.6 coverage, cell header filter/screen against four maskable 32-bit
programmable values, validation of payload length per segment type, and correct
payload CRC value. Status reporting on validation steps is via error counters and
status register indications. Status bits can be programmed to generate interrupts to
the microprocessor. Each validation step can be individually disabled. Cells are
routed to one of four output ports if a match to that port
’
s programmable header
value is made.
Each cell is output to the ATM interface after a 6- or 10-octet buffer to allow
for header processing. A
“
cell-valid
”
output pin is provided to indicate that none
of the enabled error checks detected an error. The UTOPIA internal FIFO or
external circuitry is notified to discard the cell when the valid indication goes
inactive. Idle cells are automatically deleted from the ATM layer output. Parity
and control/delineation signals are provided with each octet at the port interface.
The microprocessor receives status and error counts as cell validation proceeds.
All event and error counters can be programmed to cause an interrupt on
相關(guān)PDF資料
PDF描述
28C010TRPDB-12 150 x 32 pixel format, LED Backlight available
28C010TRT1DE-15 1 Megabit (128K x 8-Bit) EEPROM
28C010TRT1DE-20 1 Megabit (128K x 8-Bit) EEPROM
28C010TRT1FB-15 1 Megabit (128K x 8-Bit) EEPROM
28C010TRT1FB-20 1 Megabit (128K x 8-Bit) EEPROM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
282332-2 制造商:TE Connectivity 功能描述:
282-333 制造商:WAGO Innovative Connections 功能描述:END PLATE RAIL MOUNTED TERMINAL BLOCK 制造商:WAGO 功能描述:END PLATE, RAIL MOUNTED TERMINAL BLOCK 制造商:WAGO Innovative Connections 功能描述:END PLATE, RAIL MOUNTED TERMINAL BLOCK; Series:282; Accessory Type:End Plate; For Use With:Rail Mounted Terminal Blocks; Color:Orange; Mounting Type:DIN Rail ;RoHS Compliant: Yes
2823337 功能描述:工業(yè)繼電器 ST-REL4-KG120/21-21 RoHS:否 制造商:TE Connectivity / Kilovac 觸點形式:1 Form A (SPST-NO) 觸點電流額定值: 線圈電壓:9 VDC to 36 VDC 線圈電阻:38 Ohms 線圈電流: 切換電壓: 安裝風(fēng)格:Panel 觸點材料:Silver Palladium
282-334 制造商:WAGO Innovative Connections 功能描述:End Plate 2 mm Thick-Color Grey For Use With Rail Mounted Terminal Block 制造商:WAGO 功能描述:GREY END PLATE 制造商:WAGO Innovative Connections 功能描述:END PLATE, 2MM, GREY; Series:-; Accessory Type:End Plate; For Use With:Rail Mounted Terminal Blocks ;RoHS Compliant: Yes
282-334 制造商:WAGO Innovative Connections 功能描述:END PLATE 制造商:WAGO 功能描述:END PLATE
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*