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參數(shù)資料
| 型號(hào)： | 27C2001 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 2 Mbit 256Kb x 8 UV EPROM and OTP EPROM |
| 中文描述： | 2兆位的256Kb × 8紫外線存儲(chǔ)器和OTP存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 6/17頁(yè) |
| 文件大?。?/td> | 114K |
| 代理商： | 27C2001 |
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M27C2001
6/17
Figure 5. Read Mode AC Waveforms
AI00719B
tAXQX
tEHQZ
A0-A17
E
G
Q0-Q7
tAVQV
tGHQZ
tGLQV
tELQV
VALID
Hi-Z
VALID
Table 8B. Read Mode AC Characteristics
(1)
(TA = 0 to 70
°
C or –40 to 85
°
C; V
CC
= 5V
±
5% or 5V
±
10%; V
PP
= V
CC
)
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Sampled only, not 100% tested.
Symbol
Alt
Parameter
Test Condition
M27C2001
Unit
-10
-12
-15/-20/-25
Min
Max
Min
Max
Min
Max
t
AVQV
t
ACC
Address Valid to Output
Valid
E = V
IL
, G = V
IL
100
120
150
ns
t
ELQV
t
CE
Chip Enable Low to
Output Valid
G = V
IL
100
120
150
ns
t
GLQV
t
OE
Output Enable Low to
Output Valid
E = V
IL
50
50
60
ns
t
EHQZ(2)
t
DF
Chip Enable High to
Output Hi-Z
G = V
IL
0
30
0
40
0
50
ns
t
GHQZ(2)
t
DF
Output Enable High to
Output Hi-Z
E = V
IL
0
30
0
40
0
50
ns
t
AXQX
t
OH
Address Transition to
Output Transition
E = V
IL
, G = V
IL
0
0
0
ns
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs requirecareful decoupling of the
devices. The supply current, I
CC
, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the fallingand rising edgesof E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associatedtransient voltagepeaks
can be suppressed by complying with the two line
output control and by properly selected decoupling
capacitors. It is recommended that a 0.1
μ
F ceram-
ic capacitorbe used on every device between V
CC
and V
SS
. This should be a high frequency capaci-
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7
μ
F bulk electrolytic capacitor should be
used between V
CC
and V
SS
for every eight devic-
es. The bulk capacitor should be located near the
power supply connection point. The purposeof the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
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| 27C210-12N | Low-Power, Compact 2.5Gbps/2.7Gbps Clock-Recovery and Data-Retiming IC |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 27C2001-10F1 | 制造商:STMicroelectronics 功能描述: |
| 27C2048 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2 Megabit (128k X 16-Bit) CMOS EPROM(173.55 k) |
| 27C210 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:1M (64K x 16) CHMOS EPROM |
| 27C2100-12 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256Kx8/128x16] CMOS EPROM |
| 27C2100-15 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256Kx8/128x16] CMOS EPROM |
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