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參數(shù)資料
| 型號(hào)： | 21050 |
| 英文描述： | 21050 - 21050 PCI-to-PCI Bridge Hardware Implementation Application Note |
| 中文描述： | 21050 - 21050 PCI至PCI橋的硬件實(shí)現(xiàn)應(yīng)用筆記 |
| 文件頁數(shù)： | 3/15頁 |
| 文件大?。?/td> | 92K |
| 代理商： | 21050 |
Application Note
iii
21050 PCI-to-PCI Bridge Hardware Implementation
Contents
1.0
Introduction.........................................................................................................................5
1.1
Functional Overview..............................................................................................5
2.0
General Layout Guidelines.................................................................................................6
2.1
Pullups...................................................................................................................6
2.2
3.0
Clocking..............................................................................................................................7
3.1
21050 Clocking......................................................................................................7
3.2
21050 Output Clocks.............................................................................................7
3.3
Clock Implementation on the Motherboard ...........................................................8
3.4
Clock Implementation on an Option Card .............................................................8
4.0
Secondary IDSEL Mapping................................................................................................8
5.0
Data Synchronization and Interrupts................................................................................10
5.1
Using the 21050 Data Synchronization Pins.......................................................10
5.2
Controlling Write Posting.....................................................................................12
5.3
Interrupt Binding on Option Cards.......................................................................12
6.0
Arbitration.........................................................................................................................13
6.1
Primary Bus Arbitration .......................................................................................13
6.2
Secondary Bus Arbitration...................................................................................13
Support, Products, and Documentation ...........................................................................16
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