參數(shù)資料
型號(hào): 21050
英文描述: 21050 - 21050 PCI-to-PCI Bridge Hardware Implementation Application Note
中文描述: 21050 - 21050 PCI至PCI橋的硬件實(shí)現(xiàn)應(yīng)用筆記
文件頁(yè)數(shù): 12/15頁(yè)
文件大?。?/td> 92K
代理商: 21050
21050 PCI-to-PCI Bridge Hardware Implementation
12
Application Note
5.2
Controlling Write Posting
You can also configure the 21050 to always enable or always disable write posting.
For example:
If s_bufne_l status is not used and write posting is always enabled:
— Tie s_dispst_l high through a 1K resistor.
— Leave s_bufne_l floating.
If s_bufne_l status is not used and write posting is always disabled:
— Tie s_dispst_l low through a 1K resistor.
— Leave s_bufne_l floating.
— Set the Disable Posting bit in the 21050 configuration space [Cfg Addr 40 (hex), bit 1].
5.3
Interrupt Binding on Option Cards
When PCI-PCI Bridges are used in option cards, a binding is required by the
PCI-to-PCI Bridge
Architecture Specification
between the device number (as given in the Type 1 configuration
address and, therefore, the IDSEL line) and the INTx# line it uses when requesting an interrupt.
The PCI connector has only four interrupt lines assigned to it: INTA#, INTB#, INTC#, and INTD#.
Multiple devices might have to share these lines.
Since only the BIOS knows how the PCI INTx# lines are routed to the system interrupt controller,
a mechanism is required to inform the device driver of which IRQ its device will request an
interrupt on. The interrupt line register stores this information. The BIOS code assumes the binding
as listed in
Table 2
behind a PCI-PCI Bridge and writes the IRQ number in each device. The
interrupt binding defined in
Table 2
is mandatory for option cards utilizing PCI-PCI Bridges.
Table 2. Interrupt Binding on Option Cards
Device Number on Secondary Bus
Interrupt Pin on Device
Interrupt Pin on Connector
0, 4, 8, 12, 16, 20, 24, 28
INTA#
INTB#
INTC#
INTD#
INTA#
INTB#
INTC#
INTD#
1, 5, 9, 13, 17, 21, 25, 29
INTA#
INTB#
INTC#
INTD#
INTB#
INTC#
INTD#
INTA#
2, 6, 10, 14, 18, 22, 26, 30
INTA#
INTB#
INTC#
INTD#
INTC#
INTD#
INTA#
INTB#
3, 7, 11, 15, 19, 23, 27, 31
INTA#
INTB#
INTC#
INTD#
INTD#
INTA#
INTB#
INTC#
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