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CHAPTER 19 INTERRUPT AND TEST FUNCTIONS
Interrupt being
Acknowledged
Non-maskable
Interrupt
Request
Multiple Interrupt
Request
Maskable interrupt
servicing
19.4.3 Software interrupt acknowledge operation
A software interrupt is acknowledged by BRK instruction execution. Software interrupt cannot be disabled.
If a software interrupt is acknowledged, it is saved in the stacks, PSW and PC, in that order, the IE flag is reset
to 0 and the contents of the vector tables (003EH and 003FH) are loaded into PC and branched.
Return from the software interrupt is possible with the RETB instruction.
Caution
Do not use the RETI instruction for returning from the software interrupt.
19.4.4 Multiple interrupt servicing
Multiple interrupts, in which another interrupt is acknowledged during execution of an interrupt, can be controlled
by priorities.
Two types of priority control are available; control in the order of default priority and programmable priority control
by setting the priority specify flag registers (PR0L, PR0H and PR1L). In the former, if two or more interrupts are
generated simultaneously, interrupt servicing is carried out in accordance with the priority (default priority)
preassigned to each interrupt request (see
Table 19-1
). In the latter, interrupt requests are divided into a high-priority
group and a low-priority group by setting the bits corresponding to PR0L, PR0H, and PR1L. The following are the
interrupt requests enabled for multiple interrupts.
Table 19-4. Interrupt Request Enabled for Multiple Interrupt during Interrupt Servicing
Maskable Interrupt Request
PR=0
PR=1
IE=1
IE=0
IE=1
IE=0
Non-maskable interrupt servicing
D
D
D
D
D
ISP=0
E
E
D
D
D
ISP=1
E
E
D
E
D
Software interrupt servicing
E
E
D
E
D
Remarks 1.
E
: Multiple interrupt enable
2.
D
: Multiple interrupt disable
3.
ISP and IE are the flags contained in PSW
ISP=0 : An interrupt with higher priority is being serviced
ISP=1 : An interrupt is not accepted or an interrupt with lower priority is being serviced
IE=0
: Interrupt acknowledge is disabled
IE=1
: Interrupt acknowledge is enabled
4.
PR is a flag contained in PR0L, PR0H, PR1L
PR=0
: Higher priority level
PR=1
: Lower priority level