參數(shù)資料
型號(hào)： μPD78P048A
廠商： NEC Corp.
英文描述： 8 Bit Single Chip Microcontrollers(8位單片微控制器)
中文描述： 8位單片機(jī)微控制器（8位單片微控制器）
文件頁(yè)數(shù)： 38/72頁(yè)
文件大?。?/td> 387K
代理商： ΜPD78P048A
m
PD78P048A
38
DC Characteristics (T
A
= –40 to +85 °C, V
DD
= 2.7 to 6.0 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Low-level input
leakage current
I
LIL1
V
IN
= 0 V
P00 to P03, P10 to P17, P20
to P27, P30 to P37, RESET
–3
m
A
I
LIL2
X1, X2, XT1/P04 XT2
–20
m
A
I
LIL3
P70 to P74
–3
Note 4
m
A
I
LIL4
P110 to P117, P120 to P127
–10
m
A
High-level output
leakage current
I
LOH1
V
OUT
= V
DD
P01 to P03, P10 to P17,
P20 to P27, P30 to P37,
P80, P81, P90 to P97,
P100 to P107, P110 to P117,
P120 to P127
3
m
A
I
LOH2
V
OUT
= 15 V
P70 to P74
20
m
A
Low-level output
leakage current
I
LOL1
V
OUT
= 0 V
P01 to P03, P10 to P17,
P10 to P27, P30 to P37,
P70 to P74
–3
m
A
I
LOL2
V
OUT
= V
LOAD
= V
DD
– 35 V
P80, P81, P90 to P97,
P100 to 107, P110 to P117,
P120 to P127
–10
m
A
Display output
current
I
OD
V
DD
= 4.5 to 6.0 V, V
OD
= V
DD
– 2 V
–15
–25
mA
Software
pull-up resistor
R
1
V
IN
= 0 V,
P01 to P03, P10 to P17,
V
DD
= 4.5 to 6.0 V
15
40
90
k
W
20
500
k
W
P20 to P27, P30 to P37
On-chip
pull-down resistor
R
2
P80, P81, P90 to P97,
P100 to P105
V
OD
– V
LOAD
= 35 V
25
70
135
k
W
Power supply
current
Note 1
I
DD1
5.0 MHz crystal oscillation
operation mode
V
DD
= 5.0 V ± 10 %
Note 2
9.5
28.5
mA
9.75
Note 5
29
Note 5
mA
V
DD
= 3.0 V ± 10 %
Note 3
0.9
2.7
mA
I
DD2
5.0 MHz crystal oscillation
HALT mode
V
DD
= 5.0 V ± 10 %
2.5
7.5
mA
V
DD
= 3.0 V ± 10 %
1.0
3.0
mA
I
DD3
32.768 kHz crystal oscillation
V
DD
= 5.0 V ± 10 %
operation mode
90
180
m
A
V
DD
= 3.0 V ± 10 %
55
110
m
A
I
DD4
32.768 kHz crystal oscillation
V
DD
= 5.0 V ± 10 %
HALT mode
25
50
m
A
V
DD
= 3.0 V ± 10 %
5
10
m
A
I
DD5
XT1 = 0 V STOP mode when
connecting to feedback resistor
V
DD
= 3.0 V ± 10 %
V
DD
= 5.0 V ± 10 %
1
20
m
A
0.5
10
m
A
I
DD6
XT1 = 0 V STOP mode when not
V
DD
= 5.0 V ± 10 %
connecting to feedback resistor
V
DD
= 3.0 V ± 10 %
0.1
20
m
A
0.05
10
m
A
Notes 1.
This current excludes the AV
REF
current, port current, and current which flows in the built-in pull-down
resistor.
2.
When operating at high-speed mode (when the processor clock control register (PCC) is set to 00H)
3.
When operating at low-speed mode (when the PCC is set to 04H)
4.
For P70 to P74, a low-level input leak current of –150
m
A (MAX.) flows only during the 1.5 clocks after an
instruction has been executed to read out port 7 (P7) or port mode register 7 (PM7). Outside the period
of 1.5 clocks following executing a read-out instruction, the current is –3
m
A (MAX.).
5.
This current includes the AV
DD
current by the A/D converter operation.
Remark
Unless otherwise specified, the characteritics of a shared pin are the same as those of a port pin.
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