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Interrupt Control Register (xxICn) .......................................................................................................... 405
Format of Interrupt Mask Registers (MK0, MK1) ................................................................................... 409
Format of In-Service Priority Register (ISPR) ........................................................................................ 410
Format of Interrupt Mode Control Register (IMC) .................................................................................. 411
Format of Watchdog Timer Mode Register (WDM)................................................................................ 412
Format of Interrupt Selection Control Register (SNMI) .......................................................................... 413
Format of Program Status Word (PSWL) .............................................................................................. 414
Context Switching Operation by Execution of a BRKCS Instruction...................................................... 415
Return from BRKCS Instruction Software Interrupt (RETCSB Instruction Operation) ........................... 416
Non-Maskable Interrupt Request Acknowledgment Operations ............................................................ 418
Interrupt Acknowledgment Processing Algorithm .................................................................................. 422
Context Switching Operation by Generation of an Interrupt Request .................................................... 423
Return from Interrupt that Uses Context Switching by Means of RETCS Instruction ............................ 424
Examples of Servicing When Another Interrupt Request is Generated During Interrupt Service .......... 426
Examples of Servicing of Simultaneously Generated Interrupts............................................................ 429
Differences in Level 3 Interrupt Acknowledgment According to IMC Register Setting........................... 430
Differences between Vectored Interrupt and Macro Service Processing............................................... 431
Macro Service Processing Sequence .................................................................................................... 434
Operation at End of Macro Service When VCIE = 0.............................................................................. 436
Operation at End of Macro Service When VCIE = 1.............................................................................. 437
Macro Service Control Word Format ..................................................................................................... 439
Macro Service Mode Register Format ................................................................................................... 440
Macro Service Data Transfer Processing Flow (Type A) ....................................................................... 443
Type A Macro Service Channel.............................................................................................................. 445
Asynchronous Serial Reception............................................................................................................. 446
Macro Service Data Transfer Processing Flow (Type B) ....................................................................... 448
Type B Macro Service Channel ............................................................................................................. 449
Parallel Data Input Synchronized with External Interrupts..................................................................... 450
Parallel Data Input Timing...................................................................................................................... 451
Macro Service Data Transfer Processing Flow (Type C) ....................................................................... 453
Type C Macro Service Channel ............................................................................................................. 456
Stepping Motor Open Loop Control by Real-Time Output Port ............................................................. 458
Data Transfer Control Timing ................................................................................................................. 459
Single-Phase Excitation of 4-Phase Stepping Motor ............................................................................. 461
1-2-Phase Excitation of 4-Phase Stepping Motor .................................................................................. 461
Automatic Addition Control + Ring Control Block Diagram 1 ................................................................. 462
(When Output Timing Varies with 1-2-Phase Excitation) ....................................................................... 462
Automatic Addition Control + Ring Control Timing Diagram 1 ............................................................... 463
(When Output Timing Varies with 1-2-Phase Excitation) ....................................................................... 463
Automatic Addition Control + Ring Control Block Diagram 2 ................................................................. 464
(1-2-Phase Excitation Constant-Velocity Operation) ............................................................................. 464
Automatic Addition Control + Ring Control Timing Diagram 2 ............................................................... 465
(1-2-Phase Excitation Constant-Velocity Operation) ............................................................................. 465
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LIST OF FIGURES (6/8)
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