
– vii –
18.4.2
18.4.3
18.4.4
18.4.5
2-WIRE SERIAL I/O MODE ........................................................................................
18.5.1
Basic Operation Timing ...................................................................................................
18.5.2
Operation When Transmission Only is Enabled ............................................................
18.5.3
Operation When Reception Only is Enabled..................................................................
18.5.4
Operation When Transmission/Reception is Enabled ...................................................
18.5.5
Corrective Action in Case of Slippage of Serial Clock and Shift Operations ...............
CAUTIONS.......................................................................................................................
Operation When Transmission Only is Enabled ............................................................
Operation When Reception Only is Enabled..................................................................
Operation When Transmission/Reception is Enabled ...................................................
Corrective Action in Case of Slippage of Serial Clock and Shift Operations ...............
459
460
461
461
462
463
464
464
465
465
466
18.5
18.6
CHAPTER 19 I
2
C BUS MODE (
μ
PD784038Y SUBSERIES ONLY).............................................
19.1
OUTLINE OF FUNCTIONS ..........................................................................................
19.2
CONFIGURATION...........................................................................................................
19.3
CONTROL REGISTER ..................................................................................................
19.3.1
Clocked Serial Interface Mode Register (CSIM) ............................................................
19.3.2
I
2
C Bus Control Register (IICC)......................................................................................
19.3.3
Prescaler Mode System for Serial Clock (SPRM) .........................................................
19.3.4
Slave Address Register (SVA) ........................................................................................
19.4
I
2
C BUS MODE FUNCTION........................................................................................
19.4.1
Pin Configuration .............................................................................................................
19.4.2
Functions ..........................................................................................................................
19.5
DEFINITION AND CONTROL METHOD OF THE I
2
C BUS.................................
19.5.1
Start Condition .................................................................................................................
19.5.2
Addresses.........................................................................................................................
19.5.3
Transfer Direction Specification ......................................................................................
19.5.4
Acknowledge Signal (ACK) .............................................................................................
19.5.5
Stop Condition .................................................................................................................
19.5.6
Wait Signal (WAIT) ..........................................................................................................
19.5.7
Interrupt Request (INTCSI) Generation Timing and Wait Control ................................
19.5.8
Interrupt Request Generation Timing .............................................................................
19.5.9
Detection Method of Address Match ..............................................................................
19.5.10 Error Detection .................................................................................................................
19.6
TIMING CHART..............................................................................................................
19.7
SIGNAL AND FLAGS...................................................................................................
467
467
468
470
470
470
473
474
475
475
476
477
477
478
479
480
481
482
484
485
485
485
486
493
CHAPTER 20 CLOCK OUTPUT FUNCTION ............................................................................
20.1
CONFIGURATION...........................................................................................................
20.2
CLOCK OUTPUT MODE REGISTER (CLOM) .........................................................
20.3
OPERATION ....................................................................................................................
20.3.1
Clock Output ....................................................................................................................
20.3.2
One-Bit Output Port .........................................................................................................
20.3.3
Operation in Standby Mode ............................................................................................
20.4
CAUTIONS.......................................................................................................................
495
495
497
498
498
499
499
499
CHAPTER 21 EDGE DETECTION FUNCTION .........................................................................
21.1
EDGE DETECTION FUNCTION CONTROL REGISTERS ......................................
501
501