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CHAPTER 3 CPU ARCHITECTURE
3.10 CAUTIONS
(1) Program fetches cannot be performed from the internal high-speed RAM area (0FD00H to 0FEFFH when the LOCATION
0 instruction is executed; FFD00H to FFEFFH when the LOCATION 0FH instruction is executed).
(2) Special function registers (SFRs)
Addresses onto which SFRs are not assigned should not be accessed in the area 0FF00H to 0FFFFH
Note
. If such an
address is accessed by mistake, the
μ
PD784038 may become deadlocked. A deadlock can only be released by reset input.
Note
When the LOCATION 0 instruction is executed; FFF00H to FFFFFH when the LOCATION 0FH instruction is
executed.
(3) Stack pointer (SP) operation
With stack addressing, the entire 1-Mbyte space can be accessed, but a stack area cannot be reserved in the SFR area
or internal ROM area.
(4) Stack pointer (SP) initialization
The SP is undefined after RESET input, while non-maskable interrupts can be acknowledged directly after reset release.
Therefore, an unforeseen operation may be performed if a non-maskable interrupt request is generated while the SP is in
the undefined state directly after reset release. To minimize this risk, the following program should be coded without fail
after reset release.
RSTVCT
CSEG
DW
to
CSEG
LOCATION 0H ; or LOCATION 0FH
MOVG SP, #STKBGN
AT
RSTSTRT
0
INITSEG
RSTSTRT :
BASE
(5) The internal memory size switching register (IMS) that selects the internal memory size of the
μ
PD78P4038 cannot be
completely emulated by the in-circuit emulator and has the following restrictions. To debug products other than the
μ
PD784038, select a mask version that performs debugging as the emulation CPU.
For the selection of an emulation CPU to the
μ
PD78P4038, even if a write instruction other than FFH (EEH, DCH, CCH)
to IMS is executed the memory size (FFH) is always identical to the
μ
PD784038.
(6) Do not set external wait to the internal ROM area. Otherwise, the CPU may be in the deadlock status which can be cleared
only by reset input.
(7) If the value of the timer register is read under the condition indicated by “
×
” in Table 3-6, the read value may be illegal. Do
not read the timer register under condition “
×
”.