
CHAPTER 3 CPU ARCHITECTURE
3 2
3.2.3 Special function registers (SFR: Special Function Register)
Unlike a general register, each special function register has special functions. It is allocated in the FF00H to FFFFH
area.
The special function register can be manipulated, like the general register, with the operation, transfer and bit
manipulation instructions. Manipulatable bit units, 1, 8, and 16, depend on the special function register type.
Each manipulation bit unit can be specified as follows.
1-bit manipulation
Describe the symbol reserved with assembler for the 1-bit manipulation instruction operand (sfr.bit).
This manipulation can also be specified with an address.
8-bit manipulation
Describe the symbol reserved with assembler for the 8-bit manipulation instruction operand (sfr).
This manipulation can also be specified with an address.
16-bit manipulation
Describe the symbol reserved with assembler for the 16-bit manipulation instruction operand (sfrp).
When addressing an address, describe an even address.
Table 3-3 gives a list of special function registers. The meaning of items in the table is as follows.
Symbol
This is a symbol to indicate an address of the special function register.
The symbols shown in this column are reserved words of the RA78K/0, and have already been defined in the
header file called “sfrbit.h” of the CC78K/0. These are describable as instruction operands if the RA78K/0,
ID78K0, or SD78K/0 is used.
R/W
Indicates whether the corresponding special function register can be read or written.
R/W : Read/write enable
R
: Read only
W
: Write only
Manipulatable bit units
indicates the bit unit (1, 8, or 16 bits) in which the register can be manipulated. – indicates that the register
cannot be manipulated in the indicated bit unit.
At reset
Indicates each register status upon RESET input.