– vi –
LIST OF FIGURES (1/3)
Figure No.
Title
Page
2-1
Pin Input/Output Circuit List .................................................................................................................... 17
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12
Memory Map (
m
PD780226) ..................................................................................................................... 19
Memory Map (
m
PD780228) ..................................................................................................................... 20
Memory Map (
m
PD78F0228) ................................................................................................................... 21
Addressing of Data Memory (
m
PD780226) ............................................................................................ 25
Addressing of Data Memory (
m
PD780228) ............................................................................................ 26
Addressing of Data Memory (
m
PD78F0228) .......................................................................................... 27
Program Counter Configuration .............................................................................................................. 28
Program Status Word Configuration ....................................................................................................... 28
Stack Pointer Configuration ..................................................................................................................... 29
ata to be Saved to Stack Memory........................................................................................................... 30
Data to be Restored from Stack Memory ............................................................................................... 30
General Register Configuration............................................................................................................... 31
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10
4-11
4-12
4-13
4-14
Port Types................................................................................................................................................. 49
P00 and P01 Block Diagram ................................................................................................................... 52
P10 to P17 Block Diagram ...................................................................................................................... 53
P20 Block Diagram .................................................................................................................................. 54
P21 to P25 Block Diagram ...................................................................................................................... 55
P40 to P47 Block Diagram ...................................................................................................................... 56
P50 to P57 Block Diagram ...................................................................................................................... 57
P56 to P58 Block Diagram ...................................................................................................................... 58
P70 to P77 Block Diagram ...................................................................................................................... 59
P80 to P87 Block Diagram ...................................................................................................................... 60
P90 to P97 Block Diagram ...................................................................................................................... 61
P100 to P107 Block Diagram .................................................................................................................. 62
Port Mode Register Format ..................................................................................................................... 64
Pull-Up Resistor Option Register Format ............................................................................................... 65
5-1
5-2
5-3
5-4
5-5
Block Diagram of Clock Generation Circuit ............................................................................................ 69
Processor Clock Control Register Format .............................................................................................. 70
External Circuit of Main System Clock Oscillator ................................................................................... 71
Examples of Resonator with Bad Connection ........................................................................................ 72
Changing CPU Clock ............................................................................................................................... 76
6-1
6-2
6-3
Block Diagram of 8-Bit Remote Control Timer ....................................................................................... 77
Timer Mode Control Register 1 Format .................................................................................................. 78
Timing of Pulse Width Measurement ...................................................................................................... 80
7-1
7-2
7-3
8-Bit PWM Timers Block Diagram ........................................................................................................... 84
Format of Timer Clock Select Register ................................................................................................... 86
Format of 8-Bit Timer Control Register 5n ............................................................................................. 88