
CHAPTER 12 INTERRUPT FUNCTIONS
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12.4.2 Maskable interrupt request acknowledge operation
A maskable interrupt request becomes acknowledgeable when an interrupt request flag is set to 1 and the interrupt
mask (MK) flag is cleared to 0. A vectored interrupt request is acknowledged in an interrupt enable state (with IE flag
set to 1). However, a low-priority interrupt request is not acknowledged during high-priority interrupt service (with ISP
flag reset to 0).
Wait times from maskable interrupt request generation to interrupt servicing are shown in Table 12-3.
For the timing to acknowledge an interrupt request, refer to Figures 12-12 and 12-13.
Table 12-3. Times from Maskable Interrupt Request Generation to Interrupt Service
Minimum Time
Maximum Time
Note
When xxPR = 0
7 clocks
32 clocks
When xxPR = 1
8 clocks
33 clocks
Note
If an interrupt request is generated just before a divide
instruction, the wait time is maximized.
Remark
1 clock :
1
(f
CPU
: CPU clock)
f
CPU
If two or more maskable interrupt requests are generated simultaneously, the request specified for higher priority
with the priority specify flag is acknowledged first. If two or more requests are assigned the same priority by the
interrupt priority specify flag, the one with the higher default priority is acknowledged first.
Any reserved interrupt requests are acknowledged when they become acknowledgeable.
Figure 12-11 shows interrupt request acknowledge algorithms.
If a maskable interrupt request is acknowledged, the contents are saved in the stacks, in the order of program status
word (PSW), program counter (PC), the IE flag is reset to 0, and the acknowledged interrupt request priority specify
flag contents are transferred to the ISP flag. Further, the vector table data determined for each interrupt request is
loaded into PC and branched.
Restore from the interrupt is possible with the RETI instruction.