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CHAPTER 17 SERIAL INTERFACE CHANNEL 1
When using the busy control option, select the internal clock as the serial clock. Control with the busy
signal cannot be implemented with the external clock.
Figure 17-19 shows the operation timing when the busy control option is used.
Caution
Busy control cannot be used simultaneously with the interval time control function of
the automatic data transmit/receive interval specification register (ADTI). If used, busy
control is invalid.
Figure 17-19. Operation Timing When Busy Control Option Is Used (when BUSY0 = 0)
SCK1
D7
SO1
SI1
CSIIF1
D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
BUSY
TRF
Clears busy input
Busy input is valid
Wait
Caution
If the TRF is cleared, the SO1 pin goes low.
Remark
CSIIF1: Interrupt request flag
TRF
: Bit 3 of automatic data transmit/receive control register (ADTC)
When the busy signal becomes inactive, waiting is released. If the sampled busy signal is inactive,
transmission/reception of the next 8-bit data is started at the falling edge of the next clock.
Because the busy signal is asynchronous with the serial clock, it takes up to 1 clock until the busy signal,
even if made inactive by the slave, is sampled. It takes 0.5 clock until data transfer is started after the
busy signal was sampled.
To accurately release waiting, the slave must keep the busy signal inactive at least for the duration of
1.5 clock.
Figure 17-20 shows the timing of the busy signal and releasing the waiting. This figure shows an example
where the busy signal is active as soon as transmission/reception has been started.