參數(shù)資料
型號(hào): μPD75P3036
廠商: NEC Corp.
英文描述: 4 Bit Single Chip Microcontrollers(4 位單片微控制器)
中文描述: 4位單片微控制器(4位單片微控制器)
文件頁(yè)數(shù): 39/64頁(yè)
文件大?。?/td> 382K
代理商: ΜPD75P3036
m
PD75P3036
39
AC Characteristics (T
A
= –40 to +85 °C, V
DD
= 1.8 to 5.5 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
CPU clock cycle time
Note 1
t
CY
Operates with
V
DD
= 2.7 to 5.5 V
0.67
64
m
s
m
s
m
s
(minimum instruction
main system clock
0.95
64
execution time = 1
Operates with
114
122
125
machine cycle)
subsystem clock
TI0, TI1, TI2 input frequency
f
TI
V
DD
= 2.7 to 5.5 V
0
1.0
MHz
0
275
kHz
TI0, TI1, TI2 high-, low-level
t
TIH
, t
TIL
V
DD
= 2.7 to 5.5 V
0.48
m
s
m
s
m
s
m
s
m
s
m
s
m
s
widths
1.8
Interrupt input high-,
t
INTH
, t
INTL
INT0
IM02 = 0
Note 2
low-level widths
IM02 = 1
10
INT1, 2, 4
10
KR0 to KR7
10
RESET low-level width
t
RSL
10
Notes 1.
The cycle time of the CPU clock (
F
) is
determined by the oscillation frequency
of the connected resonator (and ex-
ternal clock), the system clock control
register (SCC), and processor clock
control register (PCC).
The figure on the right shows the sup-
ply voltage V
DD
vs. cycle time t
CY
char-
acteristics when the device operates
with the main system clock.
2t
CY
or 128/f
X
depending on the setting
of the interrupt mode register (IM0).
2.
0
1
2
3
4
5
6
1
0.5
2
3
4
5
6
60
64
(with main system clock)
t
CY
vs V
DD
Operation guaranteed range
C
C
μ
Supply voltage V
DD
[V]
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