- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382785 > μPD75P3036 (NEC Corp.) 4 Bit Single Chip Microcontrollers(4 位單片微控制器) PDF資料下載
參數(shù)資料
| 型號： | μPD75P3036 |
| 廠商： | NEC Corp. |
| 英文描述： | 4 Bit Single Chip Microcontrollers(4 位單片微控制器) |
| 中文描述： | 4位單片微控制器（4位單片微控制器） |
| 文件頁數(shù)： | 15/64頁 |
| 文件大?。?/td> | 382K |
| 代理商： | ΜPD75P3036 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當(dāng)前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁
m
PD75P3036
15
4. Mk I MODE AND Mk II MODE SELECTION FUNCTION
Setting a stack bank selection (SBS) register for the
m
PD75P3036 enables the program memory to be switched between
Mk I mode and Mk II mode. This function is applicable when using the
m
PD75P3036 to evaluate the
m
PD753036.
When the SBS bit 3 is set to 1 : sets Mk I mode (supports Mk I mode for
m
PD753036)
When the SBS bit 3 is set to 0 : sets Mk II mode (supports Mk II mode for
m
PD753036)
4.1 Difference between Mk I Mode and Mk II Mode
Table 4-1 lists points of difference between the Mk I mode and the Mk II mode for the
m
PD75P3036.
Table 4-1. Difference between Mk I Mode and Mk II Mode
Item
Mk I Mode
Mk II Mode
Program counter
PC
13-0
Program memory (bytes)
16384
Data memory (bits)
768 x 4
Stack
Stack bank
Selectable via memory banks 0 to 2
No. of stack bytes
2 bytes
3 bytes
Instruction
BRA !addr1 instruction
Not available
Available
CALLA !addr1 instruction
Instruction
CALL !addr instruction
3 machine cycles
4 machine cycles
execution time CALLF !faddr instruction
2 machine cycles
3 machine cycles
Supported mask ROM versions
When set to Mk I mode for
m
PD753036
When set to Mk II mode for
m
PD753036
Caution
The Mk II mode supports a program area exceeding 16 Kbytes for the 75X and 75XL series.
Therefore, this mode is effective for enhancing software compatibility with products exceeding 16
Kbytes.
When the Mk II mode is selected, the number of stack bytes used during execution of subroutine
call instructions increases by one byte per stack compared to the Mk I mode. When the CALL !addr
and CALLF !faddr instructions are used, the machine cycle becomes longer by one machine cycle.
Therefore, use the Mk I mode if the RAM efficiency and processing performance are more important
than software compatibility.
*
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| μPD75P70076 | 4 Bit Single Chip Microcontrollers(4位單片微控制器) |
| μPD780023(A) | 8 Bit Single Chip Microcontrollers |
| μPD780021(A) | 8 Bit Single Chip Microcontrollers |
| μPD780022(A) | 8 Bit Single Chip Microcontrollers |
| μPD780024(A) | 8 Bit Single Chip Microcontrollers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PD75R-103K | 功能描述:固定電感器 10uH 10% .08ohm Choke SMT Power Ind RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| PD75R-104K | 功能描述:固定電感器 100uH 10% .5ohm Choke SMT Power Ind RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| PD75R-104K/R500 | 制造商:API Delevan 功能描述:PD75R series 100 uH 10 % 740 mA SMT Power Choke |
| PD75R-123K | 功能描述:固定電感器 12uH 10% .085ohm Choke SMT Power Ind RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| PD75R-123K TR 500 | 制造商:API Delevan 功能描述:POWER CHOKE 12 UH 10% SMD |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。