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參數(shù)資料
| 型號： | μPD75P3036 |
| 廠商： | NEC Corp. |
| 英文描述： | 4 Bit Single Chip Microcontrollers(4 位單片微控制器) |
| 中文描述： | 4位單片微控制器（4位單片微控制器） |
| 文件頁數(shù)： | 23/64頁 |
| 文件大?。?/td> | 382K |
| 代理商： | ΜPD75P3036 |
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m
PD75P3036
23
(3) Description of symbols used in addressing area
Remarks 1.
MB indicates access-enabled memory banks.
2.
In area *2, MB = 0 for both MBE and MBS.
3.
In areas *4 and *5, MB = 15 for both MBE and MBS.
4.
Areas *6 to *11 indicate corresponding address-enabled areas.
(4) Description of machine cycles
S indicates the number of machine cycles required for skipping of skip-specified instructions. The value of S varies as
shown below.
No skip .....................................................................S = 0
Skipped instruction is 1-byte or 2-byte instruction....S = 1
Skipped instruction is 3-byte instruction
Note
..............S = 2
Note
3-byte instructions: BR !addr, BRA !addr1, CALL !addr, CALLA !addr1
Caution
The GETI instruction is skipped for one machine cycle.
One machine cycle equals one cycle (= t
CY
) of the CPU clock
F
. Use the PCC setting to select among four cycle times.
MB = 0 (000H-07FH)
MB = 15 (F80H-FFFH)
MB = MBS
MBS = 0-2, 15
MB = MBE MBS
MBS = 0-2, 15
*1
MB = 0
*2
MBE = 1 :
MBE = 0 :
*3
MB = 15, fmem = FB0H-FBFH, FF0H-FFFH
MB = 15, pmem = FC0H-FFFH
addr = 0000H-3FFFH
*4
*5
*6
addr, addr1 =
*7
(Current PC) –15 to (Current PC) –1
(Current PC) +2 to (Current PC) +16
*8
caddr = 0000H-0FFFH (PC
13, 12
= 00B: Mk I or Mk II mode) or
1000H-1FFFH (PC
13, 12
= 01B: Mk I or Mk II mode) or
2000H-2FFFH (PC
13, 12
= 10B: Mk I or Mk II mode) or
3000H-3FFFH (PC
13, 12
= 11B: Mk I or Mk II mode)
faddr = 0000H-07FFH
taddr = 0020H-007FH
addr1 = 0000H-3FFFH
*9
*10
*11
Program memory
addressing
Data memory
addressing
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