參數(shù)資料
型號： ZPSD601(V)E1
英文描述： Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
中文描述： 現(xiàn)場可編程微控制器外圍設(shè)備和嵌入式微-細(xì)胞（可編程邏輯，零功耗，4K的位的SRAM，26余個可編程輸入/輸出，通用PLD的有63個輸入）
文件頁數(shù)： 26/98頁
文件大?。?/td> 484K
代理商： ZPSD601(V)E1
ZPSD6XX(V) Family
12-26
Bus Interface
MCU
Data Bus
CNTL0
CNTL1
CNTL2
PC7
PD0**
ADIO0
PA3–PA0
8031
68330
80198
68HC11
80C51XA
80C251
80C251
Z8
Neuron
3150
80196
80196
68HC12
***
68302
68330
68332
80C51XA
68LC302
80186
80C166
8
8
8
8
8
8
8
8
WR
R/W
WR
R/W
WR
WR
WR
R/W
RD
DS
RD
E
RD
PSEN
RD
DS
PSEN
*
*
*
PSEN
*
PSEN
*
*
*
*
*
*
*
*
*
*
*
ALE
ALE
ALE
AS
ALE
ALE
ALE
AS
A0
A0
A0
A0
A4
A0
A0
A0
*
*
*
*
A3–A0
*
*
*
*
8
R/W
DS
*
A0
16
16
16
16
16
16
16
16
16
16
WRL
WRL
R/W
R/W
R/W
R/W
WRL
WEL
WR
WR
RD
RD
E
LDS
DS
DS
RD
OE
RD
RD
BHE
*
A0
UDS
BHE
SIZ0
PSEN
*
ALE
ALE
–
AS
AS
AS
ALE
AS
ALE
ALE
A0
A0
*
*
*
*
*
*
WRH
*
*
*
*
WRH
WEH
*
*
LSTRB
–
A0/BLE
A0
A4/D0
–
A0
A0
A3–A1
*
*
*
BHE
BHE
Table 12. Microcontroller Busses and Control Signals
The “no-glue logic” ZPSD6XX(V) Microcontroller Bus Interface can be directly connected
to the most popular microcontrollers. Some of these microcontrollers with their bus types
and control signals are shown in Table 12. The interface type is specified using the PSDsoft
tools.
**
*Not used CNTL2 pin can be configured as GPLD input. Other not used pins (PC7, PD0, PA3-0) can be
configured for other I/O functions.
*
**ALE/AS input is optional for microcontrollers with a non-multiplexed bus.
***This configuration is for the 68HC12 with non-mux bus.
Table 12 shows the names of the ZPSD6XX(V) bus interface control pins and their
functions. The control pins have multiple functions and can be configured to interface to
many microcontrollers. Depending on the microcontroller, some of the control input pins are
not required and may be used as GPLD input or other I/O functions. Specific examples of
interfaces to different microcontrollers are provided in the following sections. For
microcontrollers that have more than 16 address lines, Port A, B, or C pins may be used as
additional address inputs.
相關(guān)PDF資料
PDF描述
ZPSD603(V)E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
ZPSD611(V)E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
ZPSD612(V)E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
ZPSD613(V)E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
ZPSD813F1V Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位閃速存儲器，256K位EEPROM，16K位SRAM)
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