參數(shù)資料
型號(hào): XRT86VL3X_07
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 8/153頁
文件大?。?/td> 1316K
代理商: XRT86VL3X_07
XRT86VL3X
V
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
REV. 1.2.2
Figure 59.: Process Block for Automatic Loop Code Detection .......................................................................................56
Figure 60.: Simplified Block Diagram of the RxMUTE Function ......................................................................................57
Figure 61.: Interfacing the Transmit Path to local terminal equipment .............................................................................58
Figure 63.: Waveforms for connecting the Transmit Payload Data Input Interface Block to local Terminal Equipment ..59
Figure 62.: Interfacing the Receive Path to local terminal equipment ..............................................................................59
Figure 64.: Waveforms for connecting the Receive Payload Data Input Interface Block to local Terminal Equipment ...60
Figure 65.: Transmit Non-Multiplexed High-Speed Connection to local terminal equipment using MVIP 2.048Mbit/s,
4.096Mbit/s, or 8.192Mbit/s ...............................................................................................................................61
Figure 66.: Receive Non-Multiplexed High-Speed Connection to local terminal equipment using MVIP 2.048Mbit/s,
4.096Mbit/s, or 8.192Mbit/s ...............................................................................................................................61
Figure 67.: Waveforms for Connecting the Transmit Non-Multiplexed High-Speed Input Interface at MVIP 2.048Mbit/s,
4.096Mbit/s, and 8.192Mbit/s ............................................................................................................................62
Figure 68.: Waveforms for Connecting the Receive Non-Multiplexed High-Speed Input Interface at MVIP 2.048Mbit/s,
4.096Mbit/s, and 8.192Mbit/s ............................................................................................................................62
Figure 69.: Interfacing XRT86VL3x Transmit to local terminal equipment using 16.384Mbit/s, HMVIP 16.384Mbit/s, and
H.100 16.384Mbit/s ...........................................................................................................................................66
Figure 70.: Timing signal when the framer is running at Bit-Multiplexed 16.384Mbit/s mode ..........................................66
Figure 71.: Waveforms for Connecting the Transmit Multiplexed High-Speed Input Interface at HMVIP And H.100
16.384Mbit/s mode ............................................................................................................................................67
Figure 72.: Interfacing XRT86VL3x Receive to local terminal equipment using 16.384Mbit/s, HMVIP 16.384Mbit/s, and
H.100 16.384Mbit/s ...........................................................................................................................................68
Figure 73.: Timing Signal When the Receive Framer is running at 16.384MHz Bit-Mulitplexed Mode ...........................68
Figure 74.: Timing Signal wehn the Receive Framer is Running at HMVIP and H100 16.384MHz Mode ......................68
Figure 75.: Timing Diagram of the TxSIG Input ...............................................................................................................70
Figure 76.: Timing Diagram of the RxSIG Output ............................................................................................................70
Figure 77.: Interfacing the Transmit Path to local terminal equipment .............................................................................71
Figure 79.: Waveforms for connecting the Transmit Payload Data Input Interface Block to local Terminal Equipment ..72
Figure 78.: Interfacing the Receive Path to local terminal equipment ..............................................................................72
Figure 80.: Waveforms for connecting the Receive Payload Data Input Interface Block to local Terminal Equipment ...73
Figure 81.: Transmit Non-Multiplexed High-Speed Connection to local terminal equipment using MVIP 2.048Mbit/s,
4.096Mbit/s, or 8.192Mbit/s ...............................................................................................................................74
Figure 83.: Waveforms for Connecting the Transmit Non-Multiplexed High-Speed Input Interface at MVIP 2.048Mbit/s,
4.096Mbit/s, and 8.192Mbit/s ............................................................................................................................75
Figure 82.: Receive Non-Multiplexed High-Speed Connection to local terminal equipment using MVIP 2.048Mbit/s,
4.096Mbit/s, or 8.192Mbit/s ...............................................................................................................................75
Figure 84.: Waveforms for Connecting the Receive Non-Multiplexed High-Speed Input Interface at MVIP 2.048Mbit/s,
4.096Mbit/s, and 8.192Mbit/s ............................................................................................................................76
Figure 85.: Interfacing XRT86VL3x Transmit to local terminal equipment using 16.384Mbit/s, HMVIP 16.384Mbit/s, and
H.100 16.384Mbit/s ...........................................................................................................................................78
Figure 86.: Timing Signals When the Transmit Framer is Running at 12.352 Bit-Multiplexed Mode ...............................79
Figure 87.: Timing signals when the transmit framer is running at 16.384 Bit-Multiplexed mode ....................................81
Figure 88.: Timing signals when the transmit framer is running at HMVIP / H.100 16.384MHz Mode ............................83
Figure 89.: Interfacing XRT86VL3x Receive to local terminal equipment using 16.384Mbit/s, HMVIP 16.384Mbit/s, and
H.100 16.384Mbit/s ...........................................................................................................................................84
Figure 90.: Waveforms for Connecting the Receive Multiplexed High-Speed Input Interface at 12.352Mbit/s mode .....84
Figure 91.: Waveforms for Connecting the Receive Multiplexed High-Speed Input Interface at 16.384Mbit/s mode .....84
Figure 92.: Waveforms for Connecting the Receive Multiplexed High-Speed Input Interface at HMVIP and H.100 16.384Mbit/
s mode ...............................................................................................................................................................85
Figure 93.: Timing Diagram of the TxSig_n Input ............................................................................................................87
Figure 94.: Simple Diagram of E1 system model .............................................................................................................97
Figure 95.: Generation of Yellow Alarm by the Repeater upon detection of line failure ..................................................98
Figure 96.: Generation of AIS by the Repeater upon detection of line failure ..................................................................99
Figure 97.: Generation of Yellow Alarm by the CPE upon detection of AIS originated by the Repeater .......................100
Figure 98.: Generation of CAS Multi-frame Yellow Alarm and AIS16 by the Repeater .................................................101
Figure 99.: Generation of CAS Multi-frame Yellow Alarm by the CPE upon detection of “AIS16” pattern sent by the Repeater
102
Figure 100.: Simple Diagram of DS1 System Model .....................................................................................................105
Figure 101.: Generation of Yellow Alarm by the CPE upon detection of line failure ......................................................106
Figure 102.: Generation of Yellow Alarm by the CPE upon detection of AIS originated by the Repeater .....................108
Figure 103.: Single E1 Frame Diagram .........................................................................................................................112
相關(guān)PDF資料
PDF描述
XRT86VL3X Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT91L30_0611 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L306 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L30IQ STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L30 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT86VX38 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
XRT86VX38_09 制造商:EXAR 制造商全稱:EXAR 功能描述:8-CHANNEL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VX38_0906 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
XRT86VX38IB256 制造商:EXAR 制造商全稱:EXAR 功能描述:8-CHANNEL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
XRT86VX38IB256ES 功能描述:界面開發(fā)工具 Evaluation Board for XRT86VX38 256pin ICs RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V