參數資料
型號: XRT86VL32_2
廠商: Exar Corporation
元件分類: 通信及網絡
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數: 97/155頁
文件大?。?/td> 814K
代理商: XRT86VL32_2
XRT86VL32
92
REV. V1.2.0
DUAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
2
Rx OOF
State
Change
RUR/
WC
0
Change in Receive Out of Frame Defect Condition Interrupt Status
.
This Reset-Upon-Read bit field indicates whether or not the “Change in Receive
Out of Frame Defect Condition” interrupt has occurred since the last read of this
register.
Out of Frame defect condition is declared when “TOLR” out of “RANG” errors in
the framing bit pattern is detected. (Register 0xn10B)
If this interrupt is enabled, then the Receive T1 Framer block will generate an
interrupt in response to either one of the following conditions.
1.
Whenever the Receive T1 Framer block declares the Out of Frame defect
condition.
2.
Whenever the Receive T1 Framer block clears the Out of Frame defect
condition
0 = Indicates that the “Change in Receive Out of Frame defect condition” interrupt
has not occurred since the last read of this register
1 = Indicates that the “Change in Receive Out of Frame defect condition” interrupt
has occurred since the last read of this register
1
RxAIS State
Change
RUR/
WC
0
Change in Receive AIS Condition Interrupt Status
.
This Reset-Upon-Read bit field indicates whether or not the “Change in Receive
AIS Condition” interrupt has occurred since the last read of this register.
If this interrupt is enabled, then the Receive T1 Framer block will generate an
interrupt in response to either one of the following conditions.
1.
Whenever the Receive T1 Framer block declares the AIS condition.
2.
Whenever the Receive T1 Framer block clears the AIS condition
0 = Indicates that the “Change in Receive AIS condition” interrupt has not
occurred since the last read of this register
1 = Indicates that the “Change in Receive AIS condition” interrupt has occurred
since the last read of this register
0
RxYEL State
Change
RUR/
WC
0
Change in Receive Yellow Alarm Interrupt Status.
This Reset-Upon-Read bit field indicates whether or not the “Change in Receive
Yellow Alarm Condition” interrupt has occurred since the last read of this register.
If this interrupt is enabled, then the Receive T1 Framer block will generate an
interrupt in response to either one of the following conditions.
1.
Whenever the Receive T1 Framer block declares the Yellow Alarm
condition.
2.
Whenever the Receive T1 Framer block clears the Yellow Alarm condition
0 = Indicates that the “Change in Receive Yellow Alarm condition” interrupt has
not occurred since the last read of this register
1 = Indicates that the “Change in Receive Yellow Alarm condition” interrupt has
occurred since the last read of this register
T
ABLE
80: A
LARM
& E
RROR
I
NTERRUPT
S
TATUS
R
EGISTER
(AEISR) H
EX
A
DDRESS
: 0
X
nB02
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
相關PDF資料
PDF描述
XRT86VL32 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL32_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL32IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_1 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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參數描述
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XRT86VL32IB-F 功能描述:網絡控制器與處理器 IC 1-Ch T1/E1/J1 RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT86VL34 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VL34_07 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION