參數(shù)資料
型號: XRT86VL32_2
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 109/155頁
文件大?。?/td> 814K
代理商: XRT86VL32_2
XRT86VL32
104
REV. V1.2.0
DUAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
1
RxSB_EMPT
RUR/
WC
0
Receive Slip buffer Empty Interrupt Status
This Reset-Upon-Read bit indicates whether or not the Receive Slip
Buffer Empty interrupt has occurred since the last read of this regis-
ter. The Receive Slip Buffer Empty interrupt is declared when the
receive slip buffer is emptied. If the receive slip buffer is emptied and
a READ operation occurs, then a full frame of data will be repeated,
and this interrupt bit will be set to ‘1’.
0 = Indicates that the Receive Slip Buffer Empty interrupt has not
occurred since the last read of this register.
1 = Indicates that the Receive Slip Buffer Empty interrupt has
occurred since the last read of this register.
0
RxSB_SLIP
RUR/
WC
0
Receive Slip Buffer Slips Interrupt Status
This Reset-Upon-Read bit indicates whether or not the Receive Slip
Buffer Slips interrupt has occurred since the last read of this register.
The Receive Slip Buffer Slips interrupt is declared when the receive
slip buffer is either filled or emptied. This interrupt bit will be set to ‘1’
in either one of these two conditions:
1.
If the receive slip buffer is emptied and a READ operation
occurs, then a full frame of data will be repeated, and this
interrupt bit will be set to ‘1’.
2.
If the receive slip buffer is full and a WRITE operation occurs,
then a full frame of data will be deleted, and this interrupt bit
will be set to ‘1’.
0 = Indicates that the Receive Slip Buffer Slips interrupt has not
occurred since the last read of this register.
1 = Indicates that the Receive Slip Buffer Slips interrupt has
occurred since the last read of this register.
N
OTE
:
Users still need to read the Receive Slip Buffer Empty
Interrupt (bit 1 of this register) or the Receive Slip Buffer Full
Interrupts (bit 2 of this register) to determine whether
transmit slip buffer empties or fills.
T
ABLE
86: S
LIP
B
UFFER
I
NTERRUPT
S
TATUS
R
EGISTER
(SBISR) H
EX
A
DDRESS
: 0
X
nB08
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
相關(guān)PDF資料
PDF描述
XRT86VL32 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL32_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL32IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_1 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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