參數(shù)資料
型號： XRT86VL32_1
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 16/65頁
文件大小： 403K
代理商： XRT86VL32_1
XRT86VL32
13
DUAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
REV. V1.2.0
TxCHN0_1/
TxFrTD0
TxCHN2_1/
TxFrTD2
D12
M17
I/O
8
Transmit Time Slot Octet Identifier Output 1 (TxCHNn_1) /
Transmit Serial Fractional Input (TxFrTDn):
The exact function of these pins depends on whether or not the
transmit framer enables the transmit fractional/signaling interface,
as described below:
If transmit fractional/signaling interface is disabled -
TxCHNn_1
These output signals (TxCHNn_4 through TxCHNn_0) reflect the
five-bit binary value of the current time slot being processed by the
transmit serial interface. Terminal Equipment can use the TxCH-
CLK to sample the five output pins of each channel in order to
identify the time slot being processed. This pin indicates Bit 1 of
the time slot channel being processed.
If transmit fractional/signaling interface is enabled - TxFrTDn
These pins are used as the fractional data input pins to input frac-
tional DS1/E1 payload data which will be inserted within an out-
bound DS1/E1 frame. In this mode, terminal equipment can use
either TxCHCLK or TxSERCLK to clock in fractional DS1/E1 pay-
load data depending on the framer configuration.
N
OTES
:
1.
Transmit fractional/Signaling interface can be enabled by
programming to bit 4 - TxFr1544/TxFr2048 bit from
register 0xn120 to ‘1’.
2.
These 8 pins are internally pulled “Low” for each
channel.
TxCHN0_2/
Tx32MHz0
TxCHN2_2/
Tx32MHz2
B13
T16
O
8
Transmit Time Slot Octet Identifier Output 2 (TxCHNn_2) /
Transmit 32.678MHz Clock Output (Tx32MHZ):
The exact function of these pins depends on whether or not the
transmit framer enables the transmit fractional/signaling interface,
as described below:
If transmit fractional/signaling interface is disabled -
TxCHNn_2
These output signals (TxCHNn_4 through TxCHNn_0) reflect the
five-bit binary value of the current time slot being processed by the
transmit serial interface. Terminal Equipment can use the TxCH-
CLK to sample the five output pins of each channel in order to
identify the time slot being processed. This pin indicates Bit 2 of
the time slot channel being processed.
If transmit fractional/signaling interface is enabled - Tx32MHz
These pins are used to output a 32.678MHz clock reference which
is derived from the MCLKIN input pin.
N
OTE
:
Transmit fractional interface can be enabled by
programming to bit 4 - TxFr1544/TxFr2048 bit from
register 0xn120 to ‘1’.
TRANSMIT SYSTEM SIDE INTERFACE
S
IGNAL
N
AME
B
ALL
#
T
YPE
O
UTPUT
D
RIVE
(
M
A)
D
ESCRIPTION
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