參數(shù)資料
型號： XRT83VSH28
廠商： Exar Corporation
英文描述： 8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
中文描述： 8路E1短途線路接口單元
文件頁數(shù)： 5/74頁
文件大小： 574K
代理商： XRT83VSH28
PRELIMINARY
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
XRT83VSH28
I
REV. P1.0.0
GENERAL DESCRIPTION.................................................................................................1
A
PPLICATIONS
...............................................................................................................................................1
F
IGURE
1. B
LOCK
D
IAGRAM
OF
THE
XRT83VSH28 E1 LIU (H
OST
M
ODE
)........................................................................................ 1
F
IGURE
2. B
LOCK
D
IAGRAM
OF
THE
XRT83VSH28 E1 LIU (H
ARDWARE
M
ODE
)............................................................................... 2
F
EATURES
.....................................................................................................................................................3
ORDERING INFORMATION ....................................................................................................................3
PIN DESCRIPTION BY FUNCTION...................................................................................5
R
ECEIVE
S
ECTION
.........................................................................................................................................5
T
RANSMIT
S
ECTION
.......................................................................................................................................8
P
ARALLEL
M
ICROPROCESSOR
I
NTERFACE
.....................................................................................................10
JITTER
A
TTENUATOR
....................................................................................................................................12
C
LOCK
S
YNTHESIZER
...................................................................................................................................12
A
LARM
F
UNCTIONS
/R
EDUNDANCY
S
UPPORT
.................................................................................................14
S
ERIAL
M
ICROPROCESSOR
I
NTERFACE
.........................................................................................................16
P
OWER
AND
G
ROUND
..................................................................................................................................16
FUNCTIONAL DESCRIPTION.........................................................................................19
1.0 HARDWARE MODE VS HOST MODE ................................................................................................19
1.1 FEATURE DIFFERENCES IN HARDWARE MODE ...................................................................................... 19
T
ABLE
1: D
IFFERENCES
B
ETWEEN
H
ARDWARE
M
ODE
AND
H
OST
M
ODE
.......................................................................................... 19
2.0 RECEIVE PATH LINE INTERFACE ....................................................................................................20
F
IGURE
3. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
R
ECEIVE
P
ATH
...................................................................................................... 20
2.1 LINE TERMINATION (RTIP/RRING) .............................................................................................................. 20
2.1.1 CASE 1: INTERNAL TERMINATION.......................................................................................................................... 20
T
ABLE
2: S
ELECTING
THE
I
NTERNAL
I
MPEDANCE
............................................................................................................................. 20
F
IGURE
4. T
YPICAL
C
ONNECTION
D
IAGRAM
U
SING
I
NTERNAL
T
ERMINATION
.................................................................................... 20
2.1.2 CASE 2: INTERNAL TERMINATION WITH ONE EXTERNAL FIXED RESISTOR FOR ALL MODES .................... 21
T
ABLE
3: S
ELECTING
THE
V
ALUE
OF
THE
E
XTERNAL
F
IXED
R
ESISTOR
............................................................................................. 21
F
IGURE
5. T
YPICAL
C
ONNECTION
D
IAGRAM
U
SING
O
NE
E
XTERNAL
F
IXED
R
ESISTOR
....................................................................... 21
2.2 CLOCK AND DATA RECOVERY ................................................................................................................... 22
F
IGURE
6. R
ECEIVE
D
ATA
U
PDATED
ON
THE
R
ISING
E
DGE
OF
RCLK.............................................................................................. 22
F
IGURE
7. R
ECEIVE
D
ATA
U
PDATED
ON
THE
F
ALLING
E
DGE
OF
RCLK............................................................................................ 22
T
ABLE
4: T
IMING
S
PECIFICATIONS
FOR
RCLK/RPOS/RNEG.......................................................................................................... 22
2.2.1 RECEIVE SENSITIVITY.............................................................................................................................................. 23
F
IGURE
8. T
EST
C
ONFIGURATION
FOR
M
EASURING
R
ECEIVE
S
ENSITIVITY
........................................................................................ 23
2.2.2 INTERFERENCE MARGIN ......................................................................................................................................... 23
F
IGURE
9. T
EST
C
ONFIGURATION
FOR
M
EASURING
I
NTERFERENCE
M
ARGIN
.................................................................................... 23
2.2.3 GENERAL ALARM DETECTION AND INTERRUPT GENERATION ........................................................................ 23
2.3 RECEIVE JITTER ATTENUATOR .................................................................................................................. 24
2.4 HDB3 DECODER ............................................................................................................................................ 25
2.5 RPOS/RNEG/RCLK ........................................................................................................................................ 25
F
IGURE
10. S
INGLE
R
AIL
M
ODE
W
ITH
A
F
IXED
R
EPEATING
"0011" P
ATTERN
................................................................................... 25
F
IGURE
11. D
UAL
R
AIL
M
ODE
W
ITH
A
F
IXED
R
EPEATING
"0011" P
ATTERN
...................................................................................... 25
2.6 RXMUTE (RECEIVER LOS WITH DATA MUTING) ....................................................................................... 26
F
IGURE
12. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
R
X
MUTE F
UNCTION
............................................................................................ 26
3.0 TRANSMIT PATH LINE INTERFACE .................................................................................................27
F
IGURE
13. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
T
RANSMIT
P
ATH
................................................................................................... 27
3.1 TCLK/TPOS/TNEG DIGITAL INPUTS ............................................................................................................ 27
F
IGURE
14. T
RANSMIT
D
ATA
S
AMPLED
ON
F
ALLING
E
DGE
OF
TCLK ............................................................................................... 27
F
IGURE
15. T
RANSMIT
D
ATA
S
AMPLED
ON
R
ISING
E
DGE
OF
TCLK ................................................................................................. 27
T
ABLE
5: T
IMING
S
PECIFICATIONS
FOR
TCLK/TPOS/TNEG........................................................................................................... 28
3.2 HDB3 ENCODER ............................................................................................................................................ 28
T
ABLE
6: E
XAMPLES
OF
HDB3 E
NCODING
...................................................................................................................................... 28
3.3 TRANSMIT JITTER ATTENUATOR ............................................................................................................... 29
T
ABLE
7: M
AXIMUM
G
AP
W
IDTH
FOR
M
ULTIPLEXER
/M
APPER
A
PPLICATIONS
.................................................................................... 29
3.4 TAOS (TRANSMIT ALL ONES) ..................................................................................................................... 29
F
IGURE
16. TAOS (T
RANSMIT
A
LL
O
NES
)...................................................................................................................................... 29
3.5 TRANSMIT DIAGNOSTIC FEATURES .......................................................................................................... 29
3.5.1 ATAOS (AUTOMATIC TRANSMIT ALL ONES)......................................................................................................... 29
F
IGURE
17. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
ATAOS F
UNCTION
............................................................................................... 30
3.5.2 QRSS GENERATION.................................................................................................................................................. 30
T
ABLE
8: R
ANDOM
B
IT
S
EQUENCE
P
OLYNOMIALS
........................................................................................................................... 30
相關PDF資料
PDF描述
XRT83VSH28IB 8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
XRT83VSH314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83VSH314IB 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83VSH316 16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83VSH316IB 16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
相關代理商/技術參數(shù)
參數(shù)描述
XRT83VSH28ES 功能描述:外圍驅(qū)動器與原件 - PCI 8 CH E1 LIU SH (low cost version) RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83VSH28IB 功能描述:接口 - 專用 8 Ch T1/E1 Framer RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:BGA-59
XRT83VSH28IB-F 功能描述:外圍驅(qū)動器與原件 - PCI 8 Channel 1.8V-3.3V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83VSH28IB-F 制造商:Exar Corporation 功能描述:T1/E1 LIU IC
XRT83VSH314 制造商:EXAR 制造商全稱:EXAR 功能描述:14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
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