QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR REV. 1.0.1 6 RPOS" />
參數(shù)資料
型號(hào): XRT83L34IVTR
廠商: Exar Corporation
文件頁(yè)數(shù): 89/99頁(yè)
文件大小: 0K
描述: IC LIU T1/E1/J1 QUAD 128TQFP
標(biāo)準(zhǔn)包裝: 750
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 4/4
規(guī)程: T1,E1,J1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-TQFP(14x20)
包裝: 帶卷 (TR)
xr
XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR REV. 1.0.1
6
RPOS_0/
RDATA_0
RPOS_1/
RDATA_1
RPOS_2/
RDATA_2
RPOS_3/
RDATA_3
7
25
78
96
O
Receiver Positive-Polarity Data Output/Receive Data Output - Channel
n:
The exact function of this output pin depends upon whether the XRT83L34
device has been configured to operate in the Single-Rail or Dual-Rail Mode
as described below.
Dual-Rail Mode Operation - Receive Positive-Polarity Data Output Pin -
RPOS_n:
The Receive Section of Channel n will output the positive-polarity portion of
the Recovered incoming DS1/E1 data (from the remote terminal equipment)
via this output pin. Each Channel (within the XRT83L34 device) will update
the data (that is output via this output pin) upon the "user-selected" edge of
the RCLK_n output clock signal.
The "Negative-Portion" of this recovered incoming DS1/E1 data (from the
remote terminal equipment) will be output via the corresponding RNEG_n
output pin.
Single-Rail Mode Operation - Receive Data Output Pin - RDATA_n
If Channel n has been configured to operate in the Single-Rail Mode, then
the entire incoming DS1/E1 data (that has been recovered by the Receive
Section of Channel n) will be output via this output pin upon the "user-
selected" edge of the RCLK_n output clock signal.
RTIP_0
RTIP_1
RTIP_2
RTIP_3
9
23
80
94
I
Receiver Differential Tip Positive Input for Channel _n:
This input pin, along with the corresponding RRING_n input pin functions as
the "Receive DS1/E1 Line Signal" for Channel n, within the XRT83L34
device.
The user is expected to connect this signal and the corresponding RRING_n
input signal to a 1:1 transformer.
Whenever the RTIP_n/RRING_n input pins are receiving a positive-polarity
pulse within the incoming DS1 or E1 line signal, then this input pin will be
pulsed to a "higher-voltage" than that of the corresponding RRING_n input
pin.
Conversely, whenever the RTIP_n/RRING_n input pins are receiving a nega-
tive-polarity pulse within the incoming DS1 or E1 line signal, then this input
pin will be pulsed to a "lower-voltage" than that of the corresponding
RRING_n input pin.
RRING_0
RRING_1
RRING_2
RRING_3
10
22
81
93
I
Receiver Differential Ring Negative Input for Channel _n:
This input pin, along with the corresponding RTIP_n input pin functions as
the "Receive DS1/E1 Line Signal" for Channel n, within the XRT83L34
device.
The user is expected to connect this signal and the corresponding RTIP_n
input signal to a 1:1 transformer.
Whenever the RTIP_n/RRING_n input pins are receiving a positive-polarity
pulse within the incoming DS1 or E1 line signal, then this input pin will be
pulsed to a "lower-voltage" than that of the corresponding RTIP_n input pin.
Conversely, whenever the RTIP_n/RRING_n input pins are receiving a nega-
tive-polarity pulse within the incoming DS1 or E1 line signal, then this input
pin will be pulsed to a "higher-voltage" than that of the corresponding RTIP_n
input pin.
SIGNAL NAME
PIN #TYPE
DESCRIPTION
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